参数资料
型号: EVAL-AD5422LFEBZ
厂商: Analog Devices Inc
文件页数: 11/44页
文件大小: 0K
描述: BOARD EVAL FOR AD5422LFEBZ
标准包装: 1
系列: *
Data Sheet
AD5412/AD5422
Rev. I | Page 19 of 44
0
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
–1.4
–1.6
–1.8
0
5
10
15
20
25
30
35
06996-
302
FOOTR
OOM
V
OLTA
GE
(
V
)
RLOAD (kΩ)
TA = 25°C
0V TO 10V RANGE
Figure 35.VOUT Footroom
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
0.03
0.04
0.05
–20
–15
–10
–5
0
5
10
15
20
C
H
A
N
GE
IN
OU
TP
U
T
V
OLTA
GE
(
V
)
SOURCE/SINK CURRENT (mA)
AVDD = +15V
TA = 25°C
±10V RANGE
AVSS = –15V
06996-
132
Figure 36. Source and Sink Capability of Output Amplifier,
Full-Scale Code Loaded
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
0.03
0.04
0.05
–20
–15
–10
–5
0
5
10
15
20
C
H
A
N
GE
IN
OU
TP
U
T
V
OLTA
GE
(
V
)
SOURCE/SINK CURRENT (mA)
AVDD = +15V
AVSS = –15V
TA = 25°C
±10V RANGE
06996-
035
Figure 37. Source and Sink Capability of Output Amplifier,
Zero-Scale Loaded
–12
–8
–4
0
4
8
12
–10
–5
0
5
10
15
20
25
30
OU
TP
U
T
V
OLTA
GE
(
V
)
TIME (s)
±10V RANGE
TA = 25°C
OUTPUT UNLOADED
06996-
136
AVSS = –24V
AVDD = +24V
Figure 38. Full-Scale Positive Step
–12
–8
–4
0
4
8
12
–10
–5
0
5
10
15
20
25
30
OU
TP
U
T
V
OLTA
GE
(
V
)
TIME (s)
AVSS = –24V
±10V RANGE
TA = 25°C
OUTPUT UNLOADED
AVDD = +24V
06996-
137
Figure 39. Full-Scale Negative Step
–16
–14
–12
–10
–8
–6
–4
–2
0
2
4
–1
1
3
5
7
9
11
13
15
OU
TP
U
T
V
OLTA
GE
(
m
V
)
TIME (s)
0x8000 TO 0x7FFF
0x7FFF TO 0x8000
AVDD = +24V
TA = 25°C
±10V RANGE
AVSS = –24V
06996-
036
Figure 40. Digital-to-Analog Glitch
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