参数资料
型号: EVAL-AD5520EBZ
厂商: Analog Devices Inc
文件页数: 11/24页
文件大小: 0K
描述: BOARD EVAL FOR AD5520
标准包装: 1
主要目的: 测试与测量,每引脚参数测量单元(PPMU)
已用 IC / 零件: AD5520
已供物品:
相关产品: AD5520JSTZ-ND - IC PPMU SNGL-CH 64-LQFP
AD5520
Rev. B | Page 19 of 24
PCB LAYOUT AND POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful considera-
tion to the power supply and the ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5520 is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the PMU is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
This PMU should have ample supply bypassing of 10 μF in
parallel with 0.1 μF on the supply and should be located as close
as possible to the package, ideally right up against the device. The
0.1 μF capacitor should have low effective series resistance (ESR)
and effective series inductance (ESI), such as the common
ceramic types that provide a low impedance path to ground at
high frequencies, to handle transient currents due to internal
logic switching. Low ESR (1 μF to 10 μF) tantalum or electrolytic
capacitors should also be applied at the supplies to minimize
transient disturbance and filter out low frequency ripple.
Fast switching signals, such as clocks, should be shielded with
digital ground to avoid radiating noise to other parts of the
board and should never be run near the reference inputs.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board. A microstrip technique is by far the best but not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to the ground plane
while signal traces are placed on the solder side.
It is good practice to use compact, minimum lead length PCB
layout design. Leads to the input should be as short as possible
to minimize IR drops and stray inductance.
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