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参数资料
| 型号： | EVAL-AD5757SDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5757 |
| 标准包装： | 1 |
| DAC 的数量： | 4 |
| 位数： | 16 |
| 数据接口： | 串行 |
| 设置时间： | 15µs |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 105°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD5757 |
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AD5757
Data Sheet
Rev. D | Page 26 of 44
PROGRAMMING SEQUENCE TO WRITE/ENABLE
THE OUTPUT CORRECTLY
To correctly write to and set up the part from a power-on
condition, use the following sequence:
1. Perform a hardware or software reset after initial power-on.
2. The dc-to-dc converter supply block must be configured.
Set the dc-to-dc switching frequency, maximum output
voltage allowed, and the phase that the four dc-to-dc
channels clock at.
3. Configure the DAC control register on a per channel basis.
The output range is selected, and the dc-to-dc converter
block is enabled (DC_DC bit). Other control bits can be
configured at this point. Set the INT_ENABLE bit;
however, the output enable bit (OUTEN) should not be set.
4. Write the required code to the DAC data register. This
implements a full DAC calibration internally. Allow at least
200 s before Step 5 for reduced output glitch.
5. Write to the DAC control register again to enable the
output (set the OUTEN bit).
A flowchart of this sequence is shown in Figure 51.
POWER ON.
STEP 1: PERFORM A SOFTWARE/HARDWARE RESET.
STEP 4: WRITE TO EACH/ALL DAC DATA REGISTERS.
ALLOW AT LEAST 200s BETWEEN STEP 3
AND STEP 5 FOR REDUCED OUTPUT GLITCH.
STEP 2: WRITE TO DC-TO-DC CONTROL REGISTER TO
SET DC-TO-DC CLOCK FREQUENCY, PHASE,
AND MAXIMUM VOLTAGE.
STEP 3: WRITE TO DAC CONTROL REGISTER. SELECT
THE DAC CHANNEL AND OUTPUT RANGE.
SET THE DC_DC BIT AND OTHER CONTROL
BITS AS REQUIRED. SET THE INT_ENABLE BIT
BUT DO NOT SELECT THE OUTEN BIT.
STEP 5: WRITE TO DAC CONTROL REGISTER. RELOAD
SEQUENCE AS IN STEP 3 ABOVE. THIS TIME
SELECT THE OUTEN BIT TO ENABLE
THE OUTPUT.
09225-
073
Figure 51. Programming Sequence for Enabling the Output Correctly
CHANGING AND REPROGRAMMING THE RANGE
When changing between ranges, the same sequence as
described in the Programming Sequence to Write/Enable the
Output Correctly section should be used. It is recommended to
set the range to zero scale prior to disabling the output. Because
the dc-to-dc switching frequency, maximum voltage, and phase
have already been selected, there is no need to reprogram these.
A flowchart of this sequence is shown in Figure 52.
CHANNEL’S OUTPUT IS ENABLED.
STEP 3: WRITE VALUE TO THE DAC DATA REGISTER.
STEP 1: WRITE TO CHANNEL’S DAC DATA
REGISTER. SET THE OUTPUT
TO 0V (ZERO OR MIDSCALE).
STEP 2: WRITE TO DAC CONTROL REGISTER.
DISABLE THE OUTPUT (OUTEN = 0), AND
SET THE NEW OUTPUT RANGE. KEEP THE
DC_DC BIT AND THE INT_ENABLE BIT SET.
STEP 4: WRITE TO DAC CONTROL REGISTER.
RELOAD SEQUENCE AS IN STEP 2 ABOVE.
THIS TIME SELECT THE OUTEN BIT TO
ENABLE THE OUTPUT.
09225-
074
Figure 52. Steps for Changing the Output Range
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