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| 型号： | EVAL-AD5757SDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 37/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5757 |
| 标准包装： | 1 |
| DAC 的数量： | 4 |
| 位数： | 16 |
| 数据接口： | 串行 |
| 设置时间： | 15µs |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 105°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD5757 |
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AD5757
Data Sheet
Rev. D | Page 42 of 44
DC-to-DC Converters
To achieve high efficiency, good regulation, and stability, a well-
designed printed circuit board layout is required.
Follow these guidelines when designing printed circuit boards
Keep the low ESR input capacitor, CIN, close to AVCC
and PGND.
Keep the high current path from CIN through the inductor,
LDCDC, to SWX and PGND as short as possible.
Keep the high current path from CIN through LDCDC and the
rectifier, DDCDC, to the output capacitor, CDCDC, as short as
possible.
Keep high current traces as short and as wide as possible.
The path from CIN through the inductor, LDCDC, to SWX and
PGND should be able to handle a minimum of 1 A.
Place the compensation components as close as possible to
COMPDCDC_x.
Avoid routing high impedance traces near any node
connected to SWx or near the inductor to prevent radiated
noise injection.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. Analog
Devices iCoupler products can provide voltage isolation in
excess of 2.5 kV. The serial loading structure of the AD5757
makes it ideal for isolated interfaces because the number of
interface lines is kept to a minimum. Figure 65 shows a 4-channel
isolated interface to the AD5757 using an ADuM1400. For
more information, visit www.analog.com.
VIA
SERIAL CLOCK
OUT
TO SCLK
VOA
ENCODE
DECODE
VIB
SERIAL DATA
OUT
TO SDIN
VOB
ENCODE
DECODE
VIC
SYNC OUT
VOC
ENCODE
DECODE
VID
CONTROL OUT
VOD
ENCODE
DECODE
MICROCONTROLLER
ADuM1400*
*ADDITIONAL PINS OMITTED FOR CLARITY.
TO SYNC
TO LDAC
09225-
081
Figure 65. Isolated Interface
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