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| 型号： | EVAL-AD5933EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/40页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD5933 |
| 产品培训模块： | AD5933 Impedance to Digital Converter ADP2102 DSP Battery Life Applications Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 标准包装： | 1 |
| 主要目的： | 计时，直接数字合成（DDS） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD5933 |
| 主要属性： | 12 位数模转换器，24 位调节字宽 |
| 次要属性： | 16MHz 2.7 V ~ 5.5 V 图形用户界面 |
| 已供物品： | 板，缆线，CD |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
| 相关产品： | AD5933YRSZ-REEL7-ND - NETWORK ANALYZER 12B 1MSP 16SSOP AD5933YRSZ-ND - IC NTWK ANALYZER 12B 1MSP 16SSOP |
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Data Sheet
AD5933
Rev. E | Page 19 of 40
GAIN FACTOR TEMPERATURE VARIATION
The typical impedance error variation with temperature is in
the order of 30 ppm/°C. Figure 25 shows an impedance profile
with a variation in temperature for 100 k impedance using a
two-point gain factor calibration.
101.5
98.5
54
66
FREQUENCY (kHz)
IMPED
A
N
C
E
(k
)
101.0
100.5
100.0
99.5
99.0
56
58
60
62
64
+125°C
+25°C
VDD = 3.3V
CALIBRATION FREQUENCY = 60kHz
MEASURED CALIBRATION IMPEDANCE = 100k
05324-
025
–40°C
Figure 25. Impedance Profile Variation with Temperature Using a Two-Point
Gain Factor Calibration
IMPEDANCE ERROR
It is important when reading the following section to note that
the output impedance associated with the excitation voltages
was actually measured and then calibrated out for each
impedance error measurement. This was done using a Keithley
current source/sink and measuring the voltage.
ROUT (for example ,200 Ω specified for a 1.98 V p-p in the
specification table) is only a typical specification and can vary
from part to part. This method may not be achievable for large
volume applications and in such cases, it is advised to use an
extra low impedance output amplifier, as shown in Figure 4, to
improve accuracy.
Please refer to CN-0217 for impedance accuracy examples on
the AD5933 product web-page.
MEASURING THE PHASE ACROSS AN IMPEDANCE
The AD5933 returns a complex output code made up of sepa-
rate real and imaginary components. The real component is
stored at Register Address 0x94 and Register Address 0x95 and
the imaginary component is stored at Register Address 0x96
and Register Address 0x97 after each sweep measurement.
These correspond to the real and imaginary components of
the DFT and not the resistive and reactive components of the
impedance under test.
For example, it is a very common misconception to assume
that if a user is analyzing a series RC circuit, the real value
stored in Register Address 0x94 and Register Address 0x95
and the imaginary value stored at Register Address 0x96
and Register Address 0x97 correspond to the resistance and
capacitive reactance, respectfully. However, this is incorrect
because the magnitude of the impedance (|Z|) can be calculated
by calculating the magnitude of the real and imaginary compo-
nents of the DFT given by the following formula:
2
I
R
Magnitude
+
=
After each measurement, multiply it by the calibration term and
invert the product. The magnitude of the impedance is, therefore,
given by the following formula:
Magnitude
Factor
Gain
Impedance
×
=
1
Where gain factor is given by
Magnitude
Impedance
Code
Admittance
Factor
Gain
=
=
1
The user must calibrate the AD5933 system for a known
impedance range to determine the gain factor before any valid
measurement can take place. Therefore, the user must know the
impedance limits of the complex impedance (ZUNKNOWN) for the
sweep frequency range of interest. The gain factor is determined
by placing a known impedance between the input/output of the
AD5933 and measuring the resulting magnitude of the code.
The AD5933 system gain settings need to be chosen to place
the excitation signal in the linear region of the on-board ADC.
Because the AD5933 returns a complex output code made up of
real and imaginary components, the user can also calculate the
phase of the response signal through the AD5933 signal path.
The phase is given by the following formula:
Phase(rads) = tan1(I/R)
(3)
The phase measured by Equation 3 accounts for the phase shift
introduced to the DDS output signal as it passes through the
internal amplifiers on the transmit and receive side of the
AD5933 along with the low-pass filter and also the impedance
connected between the VOUT and VIN pins of the AD5933.
The parameters of interest for many users are the magnitude of
the impedance (|ZUNKNOWN|) and the impedance phase (Z).
The measurement of the impedance phase (Z) is a two step
process.
The first step involves calculating the AD5933 system phase.
The AD5933 system phase can be calculated by placing a
resistor across the VOUT and VIN pins of the AD5933 and
calculating the phase (using Equation 3) after each measure-
ment point in the sweep. By placing a resistor across the
VOUT and VIN pins, there is no additional phase lead or lag
introduced to the AD5933 signal path and the resulting phase
is due entirely to the internal poles of the AD5933, that is, the
system phase.
Once the system phase has been calibrated using a resistor, the
second step involves calculating the phase of any unknown
impedance by inserting the unknown impedance between the
VIN and VOUT terminals of the AD5933 and recalculating the
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