参数资料
型号: EVAL-AD5933EBZ
厂商: Analog Devices Inc
文件页数: 36/40页
文件大小: 0K
描述: BOARD EVALUATION FOR AD5933
产品培训模块: AD5933 Impedance to Digital Converter
ADP2102 DSP Battery Life Applications
Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
标准包装: 1
主要目的: 计时,直接数字合成(DDS)
嵌入式:
已用 IC / 零件: AD5933
主要属性: 12 位数模转换器,24 位调节字宽
次要属性: 16MHz 2.7 V ~ 5.5 V 图形用户界面
已供物品: 板,缆线,CD
产品目录页面: 797 (CN2011-ZH PDF)
相关产品: AD5933YRSZ-REEL7-ND - NETWORK ANALYZER 12B 1MSP 16SSOP
AD5933YRSZ-ND - IC NTWK ANALYZER 12B 1MSP 16SSOP
Data Sheet
AD5933
Rev. E | Page 5 of 40
Parameter
Y Version1
Unit
Test Conditions/Comments
Min
Typ
Max
RECEIVE STAGE
Input Leakage Current
1
nA
To VIN pin
Input Capacitance6
0.01
pF
Pin capacitance between VIN and GND
Feedback Capacitance (CFB)
3
pF
Feedback capacitance around current-
to-voltage amplifier; appears in
parallel with feedback resistor
ANALOG-TO-DIGITAL CONVERTER6
Resolution
12
Bits
Sampling Rate
1
MSPS
ADC throughput rate
TEMPERATURE SENSOR
Accuracy
±2.0
°C
40°C to +125°C temperature range
Resolution
0.03
°C
Temperature Conversion Time
800
μs
Conversion time of single temperature
measurement
LOGIC INPUTS
Input High Voltage (VIH)
0.7 × VDD
Input Low Voltage (VIL)
0.3 × VDD
Input Current7
1
A
TA = 25°C
Input Capacitance
7
pF
TA = 25°C
POWER REQUIREMENTS
VDD
2.7
5.5
V
IDD (Normal Mode )
10
15
mA
VDD = 3.3 V
17
25
mA
VDD = 5.5 V
IDD (Standby Mode)
11
mA
VDD = 3.3 V; see the Control Register
16
mA
VDD = 5.5 V
IDD (Power-Down Mode)
0.7
5
A
VDD = 3.3 V
1
8
A
VDD = 5.5 V
1
Temperature range for Y version =
40°C to +125°C, typical at 25°C.
2
The lower limit of the output excitation frequency can be lowered by scaling the clock supplied to the AD5933.
3
Refer to Figure 14, Figure 15, and Figure 16 for the internal oscillator frequency distribution with temperature.
4
The peak-to-peak value of the ac output excitation voltage scales with supply voltage according to the following formula:
Output Excitation Voltage (V p-p) = [2/3.3] × VDD
where VDD is the supply voltage.
5
The dc bias value of the output excitation voltage scales with supply voltage according to the following formula:
Output Excitation Bias Voltage (V) = [2/3.3] × VDD
where VDD is the supply voltage.
6
Guaranteed by design or characterization, not production tested. Input capacitance at the VOUT pin is equal to pin capacitance divided by open-loop gain of current-
to-voltage amplifier.
7
The accumulation of the currents into Pin 8, Pin 15, and Pin 16.
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