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| 型号： | EVAL-AD7685SDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/28页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7685 |
| 标准包装： | 1 |
| 系列： | PulSAR® |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 250k |
| 数据接口： | 串行 |
| 输入范围： | ±VREF |
| 在以下条件下的电源（标准）： | 10mW @ 250kSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7685 |
| 已供物品： | 板 |
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AD7685
Rev. C | Page 15 of 28
ANALOG INPUTS
Figure 28 shows an equivalent circuit of the input structure of
the AD7685.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs IN+ and IN. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V because this will cause these diodes to begin to
forward-bias and start conducting current. These diodes can
handle a forward-biased current of 130 mA maximum. For
instance, these conditions could eventually occur when the
input buffer’s (U1) supplies are different from VDD. In such a
case, an input buffer with a short-circuit current limitation can
be used to protect the part.
CIN
RIN
D1
D2
CPIN
IN+
OR IN–
GND
VDD
02
96
8-
02
6
Figure 28. Equivalent Analog Input Circuit
This analog input structure allows the sampling of the
differential signal between IN+ and IN. By using this
differential input, small signals common to both inputs are
rejected, as shown in Figure 29, which represents the typical
CMRR over frequency. For instance, by using IN to sense a
remote signal ground, ground potential differences between
the sensor and the local ADC ground are eliminated.
02
96
8-
0
27
FREQUENCY (kHz)
10000
1
10
100
1000
CM
RR
(
d
B)
80
70
60
50
40
VDD = 5V
VDD = 2.5V
Figure 29. Analog Input CMRR vs. Frequency
During the acquisition phase, the impedance of the analog
inputs (IN+ or IN) can be modeled as a parallel combination
of capacitor CPIN and the network formed by the series connection
of RIN and CIN. CPIN is primarily the pin capacitance. RIN is
typically 3 kΩ and is a lumped component made up of some
serial resistors and the on resistance of the switches. CIN is
typically 30 pF and is mainly the ADC sampling capacitor.
During the conversion phase, where the switches are opened,
the input impedance is limited to CPIN. RIN and CIN make a
1-pole, low-pass filter that reduces undesirable aliasing effects
and limits the noise.
When the source impedance of the driving circuit is low, the
AD7685 can be driven directly. Large source impedances
significantly affect the ac performance, especially THD. The dc
performances are less sensitive to the input impedance. The
maximum source impedance depends on the amount of THD
that can be tolerated. The THD degrades as a function of the
source impedance and the maximum input frequency, as shown
in Figure 30.
02
96
8-
0
28
FREQUENCY (kHz)
100
0
255075
T
H
D
(
d
B)
–60
–70
–80
–90
–100
–110
–120
RS = 33
RS = 50
RS = 100
RS = 250
Figure 30. THD vs. Analog Input Frequency and Source Resistance
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