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| 型号： | EVAL-AD7686CBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7686 |
| 标准包装： | 1 |
| 系列： | PulSAR® |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 500k |
| 数据接口： | 串行 |
| 输入范围： | ±VREF |
| 在以下条件下的电源（标准）： | 15mW @ 500kSPS，5 V |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7686 |
| 已供物品： | 板 |
| 相关产品： | AD7686CCPZRL7TR-ND - IC ADC 16BIT SAR 500KSPS 10LFCSP AD7686CCPZRL-ND - IC ADC 16BIT SAR 500KSPS 10LFCSP AD7686BCPZRL7TR-ND - IC ADC 16BIT 500KSPS 10-LFCSP AD7686BCPZRL-ND - IC ADC 16BIT 500KSPS 10-LFCSP AD7686CRMZ-ND - IC ADC 16BIT 500KSPS 10MSOP AD7686BRMZ-ND - IC ADC 16BIT 500KSPS 10-MSOP AD7686CRMZRL7-ND - IC ADC 16BIT 500KSPS 10MSOP AD7686BRMZRL7-ND - IC ADC 16BIT 500KSPS 10MSOP |
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AD7686
Rev. B | Page 20 of 28
CS MODE 4-WIRE WITH BUSY INDICATOR
This mode is usually used when a single AD7686 is connected
to an SPI-compatible digital host, which has an interrupt input,
and when it is desired to keep CNV, which is used to sample the
analog input, independent of the signal used to select the data
reading. This requirement is particularly important in applications
where low jitter on CNV is desired. The connection diagram is
shown in Figure 39, and the corresponding timing is provided
in Figure 40.
With SDI high, a rising edge on CNV initiates a conversion,
selects the CS mode, and forces SDO to high impedance. In this
mode, CNV must be held high during the conversion phase and
the subsequent data readback (if SDI and CNV are low, SDO is
driven low). Prior to the minimum conversion time, SDI can be
used to select other SPI devices, such as analog multiplexers,
but SDI must be returned low before the minimum conversion
time and held low until the maximum conversion time to
guarantee the generation of the busy signal indicator. When
conversion is complete, SDO goes from high impedance to low.
With a pull-up on the SDO line, this transition can be used as
an interrupt signal to initiate the data readback controlled by
the digital host. The AD7686 then enters the acquisition phase
and powers down. The data bits are then clocked out, MSB first,
by subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can be used to capture the data,
a digital host using the SCK falling edge allows a faster reading
rate, provided it has an acceptable hold time. After the optional
17th SCK falling edge or SDI going high, whichever occurs first,
the SDO returns to high impedance.
DATA IN
IRQ
CLK
CONVERT
CS1
VIO
DIGITAL HOST
02
96
9-
04
0
47k
CNV
SCK
SDO
SDI
AD7686
Figure 39. CS Mode 4-Wire with Busy Indicator Connection Diagram
SDO
D15
D14
D1
D0
tDIS
SCK
1
2
3
151617
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
tEN
CONVERSION
ACQUISITION
tCONV
tCYC
tACQ
ACQUISITION
SDI
CNV
tSSDICNV
tHSDICNV
02
96
9-
0
41
Figure 40. CS Mode 4-Wire with Busy Indicator Serial Interface Timing
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-AD7686SDZ | 功能描述:数据转换 IC 开发工具 EVAL BOARD 100Ksps/400Ksps 16 bit I.C RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| EVAL-AD7687CB | 制造商:Analog Devices 功能描述:EVAL BOARD 16-BIT, 250KSPS DIFFER . I.C. - Bulk |
| EVAL-AD7687CBZ | 功能描述:BOARD EVALUATION FOR AD7687 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:PulSAR® 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7687SDZ | 功能描述:BOARD EVAL FOR AD7687 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:PulSAR® 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7688CB | 制造商:Analog Devices 功能描述:EVAL BD FOR USE W/ EITHER THE ANLG DEVICES - Bulk |
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