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| 型号： | EVAL-AD7688SDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/28页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7688 |
| 标准包装： | 1 |
| 系列： | PulSAR® |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 500k |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 输入范围： | ±VREF |
| 在以下条件下的电源（标准）： | 3.75mW @ 100kSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7688 |
| 已供物品： | 板 |
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AD7688
Rev. A | Page 19 of 28
CS MODE 4-WIRE, NO BUSY INDICATOR
This mode is usually used when multiple AD7688s are
connected to an SPI-compatible digital host.
A connection diagram example using two AD7688s is shown in
With SDI high, a rising edge on CNV initiates a conversion,
selects the CS mode, and forces SDO to high impedance. In this
mode, CNV must be held high during the conversion phase and
the subsequent data readback (if SDI and CNV are low, SDO is
driven low). Prior to the minimum conversion time, SDI could
be used to select other SPI devices, such as analog multiplexers,
but SDI must be returned high before the minimum conversion
time and held high until the maximum conversion time to
avoid the generation of the BUSY signal indicator. When the
conversion is complete, the AD7688 enters the acquisition
phase and powers down. Each ADC result can be read by
bringing low its SDI input which consequently outputs the MSB
onto SDO. The remaining data bits are then clocked by
subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can be used to capture the data,
a digital host using the SCK falling edge allows a faster reading
rate provided it has an acceptable hold time. After the 16th SCK
falling edge, or when SDI goes high, whichever is earlier, SDO
returns to high impedance and another AD7688 can be read.
DATA IN
CLK
CS1
CONVERT
CS2
DIGITAL HOST
02973-
037
CNV
SCK
SDO
SDI
AD7688
CNV
SCK
SDO
SDI
AD7688
Figure 38. CS Mode 4-Wire, No BUSY Indicator Connection Diagram
SDO
D15
D14
D13
D1
D0
tDIS
SCK
12
3
30
31
32
tHSDO
tDSDO
tEN
CONVERSION
ACQUISITION
tCONV
tCYC
tACQ
ACQUISITION
SDI(CS1)
CNV
tSSDICNV
tHSDICNV
D1
14
15
tSCK
tSCKL
tSCKH
D0
D15
D14
17
18
16
SDI(CS2)
02973-
038
Figure 39. CS Mode 4-Wire, No BUSY Indicator Serial Interface Timing
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