参数资料
| 型号： | EVAL-CED1Z |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL CONVERTER |
| 标准包装： | 1 |
| 附件类型： | 接口板 |
| 适用于相关产品： | ADI 高速 ADC 评估板 |
| 其它名称： | Q3407966B Q4537177 Q5381772 |
EVAL-CED1Z
CONNECTORS
Many connectors are provided on the CED board to facilitate
design and attachment of a range of different form factor
converter boards. Due to the number of connections available
on the FPGA, certain signals on different connectors are shared
and replicated across different connectors.
All signals have been named to assist the user in identifying the
shared signals and to which group they belong. SPI signals
begin with SPI_xxx, SPORT signals begin with SPORT_xxx and
parallel/PPI signals begin with PAR_xxx/PPI_xxx. More details
of these signals are given in the relevant connector sections.
J5 – LVDS CONNECTOR
If connecting the CED1 to a high-speed LVDS converter
evaluation board, this connector should be used. The connector
provides for four differential receive and four differential
transmit data pairs in addition to separate differential receive
Table 1. LVDS Connector pin out
Preliminary Technical Data
and transmit clocks. Control of any high-speed device is
normally achieved over an interface separate to the data. For
this purpose, the SPI and some parallel control signals are also
routed over this connector. With the inclusion of three power
supplies, this connector provides the flexibility to interface to
many LVDS converters. Details of the pin-out of this connector
are given in Table 1.
Figure 3. LVDS Connector pin locations
Pin Num
1A, 1B
1C, 1D
2A
2B
C2-9, D2-7
A3-6
B3
B4
B5
B6
A7
B7
A8
B8
A9, B9
A10, B10
C10, D10
Pin Name
+VarA
CLKOUT+/-
PAR_CS0
PAR_RD
Dx+/-
SPI_SELx
PAR_WR
SPI_MISO
SPI_MOSI
SPI_CLK
TMR0/PPI_FS2
GPIO3/TMR1/PPI_FS1
RXINT/GPIO2/PPI_FS3
GPIO4/PAR_A0
+3.3VD_Edge
+VarD
CLKIN+/-
Description
Variable voltage analog power supply. See power supply section for more details.
Differential Clock Output
Parallel Chip Select 0
Parallel Read Strobe
Differential Data Receive or Transmit Pair. By default the CED board is configured for 4
receive pairs (D0-3) and 4 transmit pairs (D4-7). These can be reconfigured by changing
the termination resistors on the CED board. See schematics for more details.
SPI Peripheral Chip Select
Parallel Write Strobe
SPI Master In, Slave Out Data line
SPI Master Out, Slave In Data line
SPI Clock
Timer 0 or Frame Sync 2 for PPI usage
General Purpose I/O, Timer 1 or Frame Sync 2 for PPI usage
Receive Interrupt, General Purpose I/O or Frame Sync 3 for PPI usage
General Purpose I/0 or parallel address LSb
+3.3V Digital power supply
Variable voltage digital power supply. See power supply section for more details.
Differential Clock Input pair
Rev. PrA | Page 4 of 24
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-CED1Z | 制造商:Analog Devices 功能描述:EVALUATION BOARD ((NS)) |
| EVAL-CED1Z3 | 制造商:AD 制造商全称:Analog Devices 功能描述:18-Bit, 2.5 LSB INL, 800 kSPS SAR ADC |
| EVAL-CFTL-6V-PWRZ | 功能描述:EVAL DC POWER SUPPLY RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| EVAL-CFTL-LVDT | 功能描述:界面开发工具 RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| EVAL-CN0150A-SDPZ | 功能描述:EVAL CIRCUIT BOARD RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
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