参数资料
型号: FA5502P
厂商: FUJI ELECTRIC CO LTD
元件分类: 稳压器
英文描述: 1.5 A POWER FACTOR CONTROLLER, 150 kHz SWITCHING FREQ-MAX, PDIP16
封装: DIP-16
文件页数: 14/23页
文件大小: 217K
代理商: FA5502P
21
Quality is our message
FA5502P/M
(7) Prevention of intermittent switching of low
frequency
An intermittent switching below 10 Hz may occur in
some application. It may be avoided by the following
methods. They are given as typical preventions of
intermittent switching and may not be effective for
certain
circuits.
They
may
also
affect
the
characteristics of PFC converter. Sufficiently check the
operation on a actual circuit.
(7-1) Lowering the dc gain of voltage error amplifier
Lower the dc gain of the voltage error amplifier.
Concretely, reduce the resistance of R4 on the circuit
in Fig.6 in "8-(2)". Note that, in this case, the line and
load regulation will be lowerd.
(7-2) Connection of Rofst
Adjust the offset of the current error amplifier.
Concretely, connect a resistor Rofst of 1M
or higher
between REF pin and IIN- pin as shown in Fig.25.
Note that, in this case, the input current will be
distorted and the power factor will be slightly lowered.
13
2
1
REF
IIN-
IFB
FA5502
Rofst
R5
C3
C2
Fig.25 Connection of Rofst
(7-3) Change of compensation network of voltage
error amplifier
Replace the compensation network connected to the
voltage error amplifier with the circuit in Fig.24 in
"9-(6)”. Note that, in this case, the transient response
may be different from that before the change.
(8) Improvement of operation around zero
crossing
In some application, surge current may appear on
the line current around zero crossing. This surge
current may cause harmonic current especially in high
order. In such a case, the following method may
suppress this surge current.
(8-1) Connection of Rofst
As shown in Fig.25, connect resistor Rofst between
REF pin and IIN- pin. Use a resistor of about 1M
or
higher.
(8-2) Increase of Dmax
Increase the maximum duty cycle. Concretely, select
such a network of RT and CT for the same frequency
that CT is a smaller and RT a larger.
(See (9) Oscillator setting and maximum duty cycle.)
(9) Oscillator setting and maximum duty
cycle
The maximum duty cycle is determined by forcing
the OUT pin to be Low during the oscillator discharge
period. The oscillator discharge period changes with
RT and CT connected to CT pin. On a network of CT
and RT providing the same oscillation frequency, the
discharge period shortens and the maximum duty
cycle increases by minimizing CT and maximizing RT.
(See characteristics curve.) The maximum duty cycle
may affect the input current waveform, particularly at
zero crossing. Therefore, sufficiently test CT and RT
before determining them. Too small CT could not give
a stable oscillation on account of noise, etc. It should
be 330pF or more according to the recommended
condition.
(10) Npte in use of SYNC pin
If the external synchronizing signal is not a square
waveform or if has a trapezoid shape, a differentiating
circuit of RC network may not satisfy the waveform
condition shown in Fig.3 in “8-(1)”. In such a case,
convert the external synchronizing signal into a square
waveform by means of comparator or the like before
inputting it to a differentiating circuit of RC network.
(See "8-(1) Oscillator section".)
(11) Prevention of malfunction by noise
Noise applied to each pin may cause malfunction of
IC. If noise causes malfunction, see the notes
summarized below and confirm in actual circuit to
prevent malfunction.
Capacitor
for
noise
suppressing
should
be
connected as close to IC as possible so as to
suppress noise effectively.
(11-1) REF pin
REF pin voltage is supplied to each components of
IC as voltage source and reference voltage. A noise
applied to this pin may cause a malfunction of IC. To
suppress a malfunction by noise, connect a capacitor
of 0.1
F or more between REF pin and GND.
(11-2) IDET pin
If a noise is applied to IDET pin which detects
induvtor current, the overcurrent limiting circuit may
suffer from a malfunction. In such a case, insert an RC
filter at IDET pin.
(11-3) OVP pin
If a noise applied to OVP pin causes a malfunction,
connect a noise suppressing capacitor between OVP
and GND pins.
(11-4) CT pin
A noise applied to CT pin, which is an oscillator
output, may disturb the oscillation frequency or OUT
pulses. The wiring between oscillator timing capacitor
CT and IC must be as short as possible so as to
suppress the noise to CT pin. Pay utmost attention to
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