参数资料
型号: FAN5056V90M
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO24
封装: SOIC-24
文件页数: 6/19页
文件大小: 266K
代理商: FAN5056V90M
FAN5056V85/FAN5056V90
14
REV. 0.8.0 1/31/01
Pr
eliminar
y
Specication
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhance-
ment Mode Field Effect Transistors. Desired characteristics
are as follows:
Low Static Drain-Source On-Resistance, RDS,ON < 20m
(lower is better)
Low gate drive voltage, VGS = 4.5V rated
Power package with low Thermal Resistance
Drain-Source voltage rating > 15V.
The on-resistance (RDS,ON) is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore signicantly
affects the efciency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applica-
tions Bulletin AB-8.
Inductor Selection
Choosing the value of the inductor is a trade-off between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize rip-
ple or maximize transient performance. The rst order equa-
tion (close approximation) for minimum inductance is:
where:
Vin = Input Power Supply
Vout = Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
Vripple = Maximum peak to peak output ripple voltage budget.
The rst order equation for maximum allowed inductance is:
where:
Co = The total output capacitance
Ipp = Maximum to minimum load transient current
Vtb = The output voltage tolerance budget allocated to load
transient
Dm = Maximum duty cycle for the DC/DC converter (usu-
ally 95%).
Some margin should be maintained away from both Lmin and
Lmax. Adding margin by increasing L almost always adds
expense since all the variables are predetermined by system
performance except for Co, which must be increased to
increase L. Adding margin by decreasing L can be done by
purchasing capacitors with lower ESR. The FAN5056 pro-
vides signicant cost savings for the newer CPU systems
that typically run at high supply current.
FAN5056 Short Circuit Current Characteristics
The FAN5056 protects against output short circuit on the
core supply by latching off both the high-side and low-side
MOSFETs. The FAN5056 short circuit current characteristic
includes a hysteresis function that prevents the DC-DC con-
verter from oscillating in the event of a short circuit. The
short circuit limit is set with the RS resistor, as given by the
formula
with IDetect ≈ 50A, ISC the desired current limit, and RDS,on
the high-side MOSFET’s on resistance. Remember to make
the RS large enough to include the effects of initial tolerance
and temperature variation on the MOSFET’s RDS,on. Alter-
nately, use of a sense resistor in series with the source of the
MOSFET, as shown in Figure 6, eliminates this source of
inaccuracy in the current limit.
As an example, Figure 4 shows the typical characteristic of
the DC-DC converter circuit with an FDB6030L high-side
MOSFET (RDS = 20m maximum at 25°C * 1.25 at 75°C =
25m
) and a 8.2K R
S.
Figure 4. FAN5056 Short Circuit Characteristic
The converter exhibits a normal load regulation characteris-
tic until the voltage across the MOSFET exceeds the internal
short circuit threshold of 50A * 8.2K
= 410mV, which
occurs at 410mV/25m
= 16.4A. [Note that this current
limit level can be as high as 410mV/15m
= 27A, if the
MOSFET has typical RDS,on rather than maximum, and is at
25°C. This is the reason for using the external sense resistor.]
At this point, the internal comparator trips and signals the
Lmin
(Vin – Vout)
f
x
Vout
Vin
x
ESR
Vripple
=
Lmax
(Vin – Vout) Dm Vtb
Ipp2
= 2CO
RS
ISC *RDS, on
IDetect
=
V
OUT
(V)
0
5
10
15
20
25
Output Current (A)
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