FAN5094
PRODUCT SPECIFICATION
2
REV. 1.0.2 5/13/02
Pin Assignments
Pin Denitions
Pin Number
Pin Name
Pin Function Description
1-5
VID0-4
Voltage Identification Code Inputs. These open collector/TTL compatible
inputs will program the output voltage over the ranges specified in Table 1.
6
CLK
Clock. When PHASE is high, this pin puts out a clock signal synchronized
180
° out of phase with the internal master clock. When PHASE is low, this pin
is an input for a synchronizing clock signal.
7
BYPASS
5V Rail. Bypass this pin with a 0.1
F ceramic capacitor to AGND.
8
AGND
Analog Ground. Return path for low power analog circuitry. This pin should
be connected to a low impedance system ground plane to minimize ground
loops.
9
LDRVB
Low Side FET Driver for B. Connect this pin to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET
gate should be <0.5”.
10
GNDB
Ground B. Ground-side current sense pin. Connect directly to low-side
MOSFET source, or to sense resistor ground.
11
ISNSB
Current Sense B. Sensor side of current sense. Attach to low-side MOSFET
drain, or to source side of sense resistor.
12
SWB
High side driver source and low side driver drain switching node B. Gate
drive return for high side MOSFET, and negative input for low-side MOSFET
current sense.
13
HDRVB
High Side FET Driver B. Connect this pin to the gate of an N-channel
MOSFET. The trace from this pin to the MOSFET gate should be <0.5”.
14
BOOTB
Bootstrap B. Input supply for high-side MOSFET.
15
BOOTA
Bootstrap A. Input supply for high-side MOSFET.
16
HDRVA
High Side FET Driver A. Connect this pin to the gate of an N-channel
MOSFET. The trace from this pin to the MOSFET gate should be <0.5”.
17
SWA
High side driver source and low side driver drain switching node A. Gate
drive return for high side MOSFET, and negative input for low-side MOSFET
current sense.
18
ISNSA
Current Sense A. Sensor side of current sense. Attach to low-side MOSFET
drain, or to source side of sense resistor.
FAN5094
VID0
VID1
VID2
VID3
VID4
BYPASS
AGND
CLK
LDRVB
GNDB
ISNSB
SWB
VFB
RT
ENABLE/SS
DROOP/E*
ISHR
PHASE
PWRGD
VCC
LDRVA
GNDA
ISNSA
SWA
1
2
3
4
5
6
7
8
9
10
11
12
HDRVB
BOOTB
HDRVA
BOOTA
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15