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参数资料
| 型号： | FAN8060EMPX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 10/13页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1A 10MLP |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.2 V ~ 5.5 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.21MHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 10-MLP |
| 其它名称： | FAN8060EMPXDKR |
f P 1 =
2 π ? C OUT ? R L
C A =
The system pole is calculated by the equation:
1
(7)
The system zero is due to the output capacitor and its
ESR. System zero is calculated by the equation:
If required, add the second compensation capacitor
(C A ) to set the pole f P3 at the location of the ESR zero.
Determine (C A ) value by the equation:
C OUT ? ESR
(14)
R C
f z 1 =
1
2 π ? C OUT ? ESR
(8)
Design Example
The output characteristics of the error (Gm) amplifier
are controlled by a series capacitor and resistor
network connected at the COMP pin to GND.
The pole is calculated by the following equation:
various output voltages with loads up to 1 A with V IN at
5 V (±10% tolerance).
Table 2. Recommended Feedback and
f p 2
=
G EA
2 π ? C C ? A VEA
(9)
Compensation Values (V IN =5 V)
V O C 4 L 1 R 2 R 3
R 1
C 5
C 2
where:
1.2 V
Short
Open
G EA = Error Amplifier Transconductance (1000 μA/V);
and
C C = compensation capacitor.
1.5 V 2.55 k ? 10.2 k ?
1.8 V 10 μF 3.3 μH 5.9 k ? 11.8 k ? 4.7 k ? 1.5 nF 150 pF
2.5 V 16.2 k ? 15 k ?
Zero is due to the compensation capacitor (C C ) and
resistor (R C ) calculated by the following equation:
3.3 V
18.7 k ? 10.7 k ?
f z 2 =
1
2 π ? C C ? R C
(10)
LO
HI
EN
SYNC
PVIN
AVIN
INPUT
2.5 to 5.5V
loop has unity gain, is recommended to be set at 1/10
FAN8060
where R C is compensation resistor.
The system crossover frequency (f C ), where the control
th
of switching frequency. Generally, higher f C means
C1 C2
10nF 150pF
R1
4.7k
C5
1.5nF
SS
COMP
AGND PGND
SW
FB
L1
3.3μH
R2
16.2k
R3
15k
C3
10μF
C4
10μF
OUTPUT
2.5V/1A
faster response to load transients, but can result in
instability if not properly compensated.
The first step in compensation design is choosing the
compensation resistor (R C ) to set the crossover
frequency by the following equation:
Figure 15. Recommended Schematic (5 V IN to
2.5 V O )
R C =
2 π ? C OUT ? f C ? V OUT
G CS ? G EA ? V FB
(11)
where V FB is reference voltage.
The next step is choosing the compensation capacitor
(C C ) to achieve the desired phase margin. For
applications with typical inductor values, setting the
compensation zero, f Z2 , to below one fourth of the
crossover frequency provides sufficient phase margin.
Determine the (C C ) value by the following equation:
C C =
2
π ? R C ? f C
(12)
Then determine if the second compensation capacitor
(C A ) is required. It is required if the ESR zero of the
output capacitor is located at less than half of the
switching frequency.
< S
1
2 π ? C OUT ? ESR
f
2
(13)
? 2013 Fairchild Semiconductor Corporation
FAN8060 ? Rev. 1.0.1
10
www.fairchildsemi.com
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