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参数资料
| 型号： | FDC2512_F095 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 2/5页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 150V 1.4A 6-SSOT |
| 产品变化通告： | Mold Compound Change 08/April/2008 |
| 标准包装： | 3,000 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 150V |
| 电流 - 连续漏极(Id) @ 25° C： | 1.4A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 425 毫欧 @ 1.4A，10V |
| Id 时的 Vgs(th)（最大）： | 4V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 11nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 344pF @ 75V |
| 功率 - 最大： | 800mW |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 供应商设备封装： | 6-SSOT |
| 包装： | 带卷 (TR) |
Electrical Characteristics
T A = 25°C unless otherwise noted
Symbl
Parameter
Test Conditions
Min Typ
Max
Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
V GS = 0 V,
I D = 250 μ A
150
V
? BV DSS
? T J
Breakdown Voltage Temperature
Coefficient
I D = 250 μ A, Referenced to 25 ° C
147
mV/ ° C
I DSS
I GSSF
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
V DS = 120 V,
V GS = 20 V,
V GS = 0 V
V DS = 0 V
1
100
μ A
nA
I GSSR
Gate–Body Leakage, Reverse
V GS = –20 V, V DS = 0 V
–100
nA
On Characteristics
(Note 2)
V GS(th)
? V GS(th)
? T J
R DS(on)
I D(on)
g FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On Resistance
On–State Drain Current
Forward Transconductance
V DS = V GS , I D = 250 μ A
I D = 250 μ A, Referenced to 25 ° C
V GS = 10 V, I D = 1.4 A
V GS = 6.0 V, I D = 1.3 A
V GS = 10 V, I D = 1.4 A, T J = 125 ° C
V GS = 10 V, V DS = 5 V
V DS = 10 V,
I D = 1.4 A
2
4
2.6
–5.6
319
332
624
4
4
425
475
875
V
mV/ ° C
m ?
A
S
Dynamic Characteristics
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V DS = 75 V,
f = 1.0 MHz
V GS = 0 V,
344
22
9
pF
pF
pF
Switching Characteristics
(Note 2)
t d(on)
t r
t d(off)
t f
Q g
Q gs
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
V DD = 75 V,
V GS = 10 V,
V DS = 75 V,
V GS = 10 V
I D = 1 A,
R GEN = 6 ?
I D = 1.4 A,
6.5
3.5
22
4
8
1.5
13
7
33
8
11
ns
ns
ns
ns
nC
nC
Q gd
Gate–Drain Charge
2.3
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Source Diode Forward Current
1.3
A
V SD
t rr
Q rr
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
V GS = 0 V, I S = 1.3 A
I F = 1.4A,
d iF /d t = 300 A/μs
(Note 2)
(Note 2)
0.8
45.8
119
1.2
V
nS
nC
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R θ JC is guaranteed by design while R θ CA is determined by the user's board design.
a)
78°C/W when
mounted on a 1in 2 pad
of 2 oz copper
b)
156°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 μ s, Duty Cycle < 2.0%
3. Starting T J = 25 o C; N-ch: L = 3mH, I AS = 3 A, V DD = 150 V, V GS = 10V ; 100% UIL tested.
FDC2512 Rev B 4 (W)
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