参数资料
| 型号： | FDMF6823C |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 14/19页 |
| 文件大小： | 0K |
| 描述： | MODULE DRMOS 50A 40-PQFN |
| 标准包装： | 3,000 |
| 系列： | XS™ DrMOS |
| 类型： | 高端/低端驱动器 |
| 输入类型： | PWM |
| 输出数： | 1 |
| 电流 - 输出 / 通道： | 50A |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-PowerTFQFN |
| 供应商设备封装： | 40-PQFN（6x6） |
| 包装： | 带卷 (TR) |
Skip Mode (SMOD#)
The Skip Mode function allows for higher converter
efficiency when operated in light-load conditions. When
SMOD# is pulled LOW, the low-side MOSFET gate
signal is disabled (held LOW), preventing discharge of
the output capacitors as the filter inductor current
attempts reverse current flow – known as “Diode
Emulation” Mode.
When the SMOD# pin is pulled HIGH, the synchronous
buck converter works in Synchronous Mode. This mode
allows for gating on the Low Side MOSFET. When the
SMOD# pin is pulled LOW, the low-side MOSFET is
gated off. If the SMOD# pin is connected to the PWM
controller, the controller can actively enable or disable
SMOD# when the controller detects light-load condition
from output current sensing. Normally this pin is active
LOW. See Figure 28 for timing delays .
Table 2.
SMOD# Logic
DISB#
0
1
1
1
1
1
PWM
X
3-State
0
1
0
1
SMOD#
X
X
0
0
1
1
GH
0
0
0
1
0
1
GL
0
0
0
0
1
0
Note:
4. The SMOD# feature is intended to have a short propagation delay between the SMOD# signal and the low-side
FET V GS response time to control diode emulation on a cycle-by-cycle basis.
SMOD#
V IH_SMOD
V IL_SMOD
V IH_PWM
PWM
GH
V IL_PWM
90%
V IH_PWM
to
VSWH
10%
10%
2.2V
CCM
CCM
DCM
V OUT
VSWH
GL
90%
1.0V
10%
10%
t PD_PHGLL
t D_DEADON
t PD_PLGHL
t D_DEADOFF
t PD_SLGLL
Delay from SMOD# going
t PD_PHGHH
t PD_SHGLH
Delay from SMOD# going
LOW to LS V GS LOW
HS turn -on with SMOD# LOW
HIGH to LS V GS HIGH
? 2011 Fairchild Semiconductor Corporation
FDMF6823C ? Rev. 1.0.3
Figure 28.
SMOD# Timing Diagram
www.fairchildsemi.com
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