参数资料
| 型号： | FDMF6823C |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 4/19页 |
| 文件大小： | 0K |
| 描述： | MODULE DRMOS 50A 40-PQFN |
| 标准包装： | 3,000 |
| 系列： | XS™ DrMOS |
| 类型： | 高端/低端驱动器 |
| 输入类型： | PWM |
| 输出数： | 1 |
| 电流 - 输出 / 通道： | 50A |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-PowerTFQFN |
| 供应商设备封装： | 40-PQFN（6x6） |
| 包装： | 带卷 (TR) |
Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
V CIN
V DRV
V DISB#
V PWM
V SMOD#
V GL
V THWN#
V IN
V BOOT
V GH
V PHS
V SWH
Supply Voltage
Drive Voltage
Output Disable
PWM Signal Input
Skip Mode Input
Low Gate Manufacturing Test Pin
Thermal Warning Flag
Power Input
Bootstrap Supply
High Gate Manufacturing Test Pin
PHASE
Switch Node Input
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to CGND
Referenced to PGND, CGND
Referenced to VSWH, PHASE
Referenced to CGND
Referenced to VSWH, PHASE
Referenced to CGND
Referenced to CGND
Referenced to PGND, CGND (DC Only)
Referenced to PGND, <20 ns
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-8.0
6.0
6.0
6.0
6.0
6.0
6.0
6.0
25.0
6.0
25.0
6.0
25.0
25.0
25.0
28.0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V BOOT
I THWN#
I O(AV)
Bootstrap Supply
THWN# Sink Current
Output Current (1)
Referenced to VDRV
Referenced to VDRV, <20 ns
f SW =300 kHz, V IN =12 V, V O =1.0 V
f SW =1 MHz, V IN =12 V, V O =1.0 V
-0.1
22.0
25.0
7.0
50
45
V
V
mA
A
θ JPCB
Junction-to-PCB Thermal Resistance
2.7
°C/W
T A
T J
T STG
Ambient Temperature Range
Maximum Junction Temperature
Storage Temperature Range
-40
-55
+125
+150
+150
°C
°C
°C
ESD
Electrostatic Discharge Protection
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
2000
2500
V
Note:
1. I O(AV) is rated using Fairchild’s DrMOS evaluation board, at T A = 25°C, with natural convection cooling. This rating
is limited by the peak DrMOS temperature, T J = 150°C, and varies depending on operating conditions and PCB
layout. This rating can be changed with different application settings .
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V CIN
V DRV
Parameter
Control Circuit Supply Voltage
Gate Drive Circuit Supply Voltage
Min.
4.5
4.5
Typ.
5.0
5.0
Max.
5.5
5.5
Unit
V
V
Output Stage Supply Voltage 3.0 12.0 16.0
V IN
(2)
V
Note:
2. Operating at high V IN can create excessive AC overshoots on the VSWH-to-GND and BOOT-to-GND nodes
during MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must
remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application
Information” and “PCB Layout Guidelines” sections of this datasheet for additional information .
? 2011 Fairchild Semiconductor Corporation
FDMF6823C ? Rev. 1.0.3
www.fairchildsemi.com
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