参数资料
型号: FDS8947A
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: JFETs
英文描述: Dual P-Channel Enhancement Mode Field Effect Transistor
中文描述: 4 A, 30 V, 0.052 ohm, 2 CHANNEL, P-CHANNEL, Si, POWER, MOSFET
封装: SOIC-8
文件页数: 2/5页
文件大小: 239K
代理商: FDS8947A
Electrical Characteristics
(
T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
BV
DSS
/
T
J
I
DSS
I
GSSF
I
GSSR
ON CHARACTERISTICS
(Note 2)
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= -250 μA
I
D
= -250 μA, Referenced to 25
o
C
-30
V
Breakdown Voltage Temp. Coefficient
-23
mV /
o
C
Zero Gate Voltage Drain Current
V
DS
= -24 V, V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
-1
μA
Gate - Body Leakage, Forward
-100
nA
Gate - Body Leakage, Reverse
-100
nA
V
GS(th)
V
GS(th)
/
T
J
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250 μA
I
D
= -250 μA, Referenced to 25
o
C
-1
-1.5
-3
V
Gate Threshold Voltage Temp. Coefficient
4
mV /
o
C
Static Drain-Source On-Resistance
V
GS
= -10 V, I
D
= -4 A
0.044
0.052
T
J
=125°C
0.06
0.085
V
GS
= -4.5 V, I
D
= -3.2 A
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -10 V, I
D
= -4 A
0.067
0.08
I
D(ON)
g
FS
DYNAMIC CH ARACTERISTICS
On-State Drain Current
-20
A
Forward Transconductance
8
S
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
(Note 2)
Input Capacitance
V
= -15 V, V
GS
= 0 V,
f = 1.0 MHz
730
pF
Output Capacitance
400
pF
Reverse Transfer Capacitance
90
pF
t
D(on)
t
r
Turn - On Delay Time
V
DS
= -10 V, I
D
= -1 A
V
GS
= -10 V , R
GEN
= 6
11
20
ns
Turn - On Rise Time
10
18
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Turn - Off Delay Time
90
110
Turn - Off Fall Time
55
80
Total Gate Charge
V
DS
= -10 V, I
D
= -4 A,
V
GS
= -10 V
19
27
nC
Gate-Source Charge
3.5
Gate-Drain Charge
3.6
I
S
V
SD
t
rr
I
rr
Maximum Continuous Drain-Source Diode Forward Current
-1.3
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -1.3 A
(Note 2)
V
GS
= 0 V, I
= -1.3 A
dI
F
/dt = 100 A/μs
-0.75
-1.2
V
Reverse Recovery Time
48
100
ns
Reverse Recovery Current
0.8
A
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDS8947A Rev.B
c. 135
O
C/W on a 0.003 in
2
pad of 2oz copper.
b. 125
pad of 2oz copper.
O
C/W on a 0.02 in
2
a. 78
O
C/W on a 0.5 in
pad of 2oz copper.
2
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