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参数资料
| 型号： | FEB167 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/15页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR FAN2106 |
| 标准包装： | 1 |
| 系列： | TinyBuck™ |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.8V |
| 电流 - 输出： | 6A |
| 输入电压： | 8 ~ 20 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 500kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | FAN2106 |
| 相关产品： | FAN2106EMPXDKR-ND - IC REG BUCK SYNC ADJ 6A 25MLP FAN2106EMPXCT-ND - IC REG BUCK SYNC ADJ 6A 25MLP FAN2106EMPXTR-ND - IC REG BUCK SYNC ADJ 6A 25MLP FAN2106MPXDKR-ND - IC REG BUCK SYNC ADJ 6A 25MLP FAN2106MPXCT-ND - IC REG BUCK SYNC ADJ 6A 25MLP FAN2106MPXTR-ND - IC REG BUCK SYNC ADJ 6A 25MLP |
MOSFET is fully enhanced. The fault latch is set
immediately upon detection.
The OV and high-side short fault protections are active
all the time, including during soft-start.
Over-Temperature Protection (OTP)
The chip incorporates an over-temperature protection
circuit that sets the fault latch when a die temperature of
about 150°C is reached. The IC restarts when the die
temperature falls below 125°C.
Application Information
Bias Supply
The FAN2106 requires a 5 V supply rail to bias the IC
and provide gate-drive energy. Connect a ≥ 1.0 μf X5R
or X7R decoupling capacitor between VCC and PGND.
Since V CC is used to drive the internal MOSFET gates,
supply current is frequency and voltage dependent.
Approximate V CC current (I CC ) can be calculated using:
Auto-Restart
After a fault, EN pin is discharged by a 1 μA current sink
I CC ( mA ) = 4 . 58 + [(
V CC ? 5
227
+ 0 . 013 ) ? ( f ? 128 )]
(1)
to a 1.1 V threshold before the internal 800 K Ω pull-up is
restored. A new soft-start cycle begins when EN
charges above 1.35 V.
Depending on the external circuit, the FAN2106 can be
configured to remain latched-off or to automatically
restart after a fault.
Table 1. Fault / Restart Configurations
where frequency (f) is expressed in KHz.
Setting the Output Voltage
The output voltage of the regulator can be set from
0.8 V to 80% of V IN by an external resistor divider (R1
and R BIAS in Figure 1). For output voltages > 5 V, output
current rating may need to be de-rated depending upon
the ambient temperature, power dissipated in the
0 . 8 V V OUT ? 0 . 8 V
= + 650 nA
EN Pin
Pull to GND
Pull-up to V CC with
100 K
Open
Cap. to GND
Controller / Restart State
OFF (Disabled)
No Restart – Latched OFF
(After V CC Comes Up)
Immediate Restart After Fault
New Soft-Start Cycle After:
t DELAY (ms)=3.9 ? C(nf)
package and the PCB layout.
The external resistor divider is calculated using:
(2)
R BIAS R 1
Connect R BIAS between FB and AGND.
If R1 is open (see Figure 1), the output voltage is not
regulated eventually causing a latched fault after the soft
When EN is left open, restart is immediate.
If auto-restart is not desired, tie the EN pin to the VCC
pin or pull it HIGH after V CC comes up with a logic gate
to keep the 1 μA current sink from discharging EN to
1.1 V. Figure 23 shows one method to pull up EN to V CC
for a latch configuration.
15 VCC
start is complete (T1.0)
If the parallel combination of R1 and R BIAS is ≤ 1K Ω , the
internal SS ramp is not released and the regulator does
not start.
Setting the Switching Frequency
Switching frequency is determined by an external resistor,
R T, connected between the R(T) pin and AGND:
100K
FAN2106
R T ( K Ω ) =
(10 6 / f ) ? 135
65
(3)
where R T is in K Ω and frequency (f) is in KHz.
14 EN
3.3n
The regulator cannot start if R T is left open.
Calculating the Inductor Value
Typically the inductor value is chosen based on ripple
current ( Δ IL), which is chosen between 10 to 35% of the
maximum DC load. Regulator designs that require fast
Figure 23.
Enable Control with Latch Option
transient response use a higher ripple-current setting,
while regulator designs that require higher efficiency
Power-Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW when
keep ripple current on the low side and operate at a
lower switching frequency. The inductor value is
calculated by the following formula:
V OUT ? (1 - D)
V OUT is out of regulation, as measured at the FB pin.
Thresholds are specified in the Electrical Specifications
section. PGOOD does not assert HIGH until the fault
latch is enabled (T1.0) (see Figure 22) .
Δ I L =
L ? f
where f is the switching frequency.
(4)
? 2009 Fairchild Semiconductor Corporation
FAN2106 ? Rev. 1.1.2
11
www.fairchildsemi.com
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