参数资料
| 型号： | FSAR001BNY |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 5/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 5V 35MA 8DIP |
| 标准包装： | 59 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 5V |
| 输入电压： | 最高 600 V |
| 电压 - 压降（标准）： | 0.4V @ 35mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 35mA |
| 电流 - 限制（最小）： | 110mA |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-DIP |
| 包装： | 管件 |
Electrical Characteristics
V IN =open, V DD =V OUT +1 V, C VDD =470 μF/ 25 V, C OUT =10 μF/ 16 V, I OUT =1 mA, T A =25 ? C, unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Uni
t
VDD Section
V TH-ON
V TH-OFF
I DD-ST
I DD-OP
Turn-On Threshold Voltage
(V OUT =5V)
Turn-off Voltage (V OUT =5V)
Startup Current of VDD Pin
Operating Supply Current
VDD Pin
VDD Pin
VDD Pin
I OUT =1mA
9
3
1.0
10
4
10
1.5
11
5
30
2.0
V
V
μA
mA
V DD-OVP
Threshold of V DD OVP
V OUT +3.0 V OUT +3.5
V OUT +4.0
V
V DD-OVPHYS Threshold of V DD OVP Hysteresis
tV DD-OVP
Time Delay of V DD OVP
0.8
1.0
1.5
1.2
V
μs
VIN Section
V VIN
Supply Voltage
600
V
VST Section
I ST
I ST-LC
Supply Current from VST Pin
Supply Current After Startup
V AC =90V (V DC =120V),
V DD =10μF
HV=500V, V DD =V DD-
OFF +1V
2.50
3.75
1
5.00
20
mA
μA
DET Section
V DET_MAX
Turn-Off Synchronous Voltage
0.90
0.95
1.00
V
V DET_MAXHYS Turn-Off Synchronous Voltage Hysteresis
0.08
0.10
0.12
V
V DET_MIN
Turn-On Synchronous Voltage
0.08
0.14
0.20
V
V DET_MINHYS Turn-Off Synchronous Voltage Hysteresis
I DET
DET Current
0.08
0.14
0.1
0.20
V
μA
VOUT Section
UVP Vout
V ACC
Output Pin Under-Voltage Protection
Output Voltage Accuracy
-10.0
-2
-12.5
-15.0
2
%
%
LR
Load Regulation
I OUT =1mA to Maximum
-2
2
%
? V OUT (VIN) Line Regulation dV OUT /dV IN
-0.2
0.2
%/V
ILIM
V Drop
I G
tD OUT-ST
PSRR
Current Limit
Dropout Voltage (V OUT =5V)
Ground Pin Current (5)
Output Voltage Rising Time
(V OUT =12V) V DD to V OUT
(6)
Ripple Rejection
V DD =V OUT +3V
I OUT =35mA
Output Current =
Maximum Load
V OUT =0%~90%
C OUT =1μF
f= 50Hz, C OUT =10μF,
I OUT =35mA
f =100Hz, C OUT =10μF,
I OUT =35mA
110
0.3
40
140
0.4
1.5
50
60
170
0.5
2.0
60
mA
V
mA
μs
dB
T OTP
T HYS
Protection Junction Temperature (6)
Restart Junction Temperature (6)
150
T OTP -40
°C
°C
Notes:
5. For V Drop =1V of V OUT =3.3V version, the test condition is modified to V DD =V OUT +1.5V.
6. Guaranteed by design.
? 2010 Fairchild Semiconductor Corporation
FSAR001 ? Rev. 1.0.1
5
www.fairchildsemi.com
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