参数资料
型号: FSDM311A
厂商: Fairchild Semiconductor
文件页数: 8/12页
文件大小: 0K
描述: IC FPS PWM/SENSFET 650V 8DIP
标准包装: 50
输出隔离: 隔离
频率范围: 61 ~ 73kHz
输入电压: 7 V ~ 20 V
输出电压: 650V
功率(瓦特): 13W
工作温度: 25°C ~ 150°C
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-DIP
包装: 管件
Functional Description
1. Start-up: At start-up, the internal high-voltage current
source supplies the internal bias and charges the
external V CC capacitor, as shown in Figure 15. When
V CC reaches 9V, the device starts switching and the
internal high-voltage current source stops charging the
capacitor. The device is in normal operation provided
V CC does not drop below 7V. After start-up, the bias is
supplied from the auxiliary transformer winding.
2. Feedback Control: The FSDM311A is the voltage-
mode controlled device, as shown in Figure 17. Usually,
an opto-coupler and shunt regulator, such as KA431,
are used to implement the feedback network. The
feedback voltage is compared with an internally
generated sawtooth waveform that directly controls the
duty cycle. When the shunt regulator reference pin
voltage exceeds the internal reference voltage of 2.5V,
the opto-coupler LED current increases, the feedback
voltage V FB is pulled down, and it reduces the duty
cycle. This happens when the input voltage increases or
the output load decreases.
Figure 15.
Internal Start-up Circuit
Calculating the V CC capacitor is an important step in
design with the FSDM311A. At initial start-up, the
Figure 17.
PWM and Feedback Circuit
maximum value of start operating current I START is about
100μA, which supplies current to UVLO and V REF
blocks. The charging current I Vcc of the V CC capacitor is
equal to I STR – 100μA. After V CC reaches the UVLO start
voltage, only the bias winding supplies V CC current to
the device. When the bias winding voltage is not
sufficient, the V CC level decreases to the UVLO stop
voltage and the internal current source is activated
again to charge the V CC capacitor. To prevent this V CC
fluctuation (charging/discharging), the V CC capacitor
should be chosen for a value between 10μF and 47μF.
Figure 16. Charging V CC Capacitor through V STR
? 2007 Fairchild Semiconductor Corporation
FSDM311A ? Rev.1.0.2
3. Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, the primary-side
capacitance and secondary-side rectifier diode reverse
recovery typically cause a high-current spike through
the SenseFET. Excessive voltage across the R SENSE
resistor leads to incorrect pulse-by-pulse current limit
protection. To avoid this, a leading-edge blanking (LEB)
circuit disables pulse-by-pulse current limit protection
block for a fixed time (t LEB ) after the SenseFET turns on.
4. Protection Circuit: The FSDM311A has several
protective functions, such as overload protection (OLP),
over-voltage protection (OVP), under-voltage lockout
(UVLO), and thermal shutdown (TSD). Because these
protection circuits are fully integrated in the IC without
external components, the reliability is improved without
increasing costs. Once a fault condition occurs,
switching is terminated and the SenseFET remains off,
which causes V CC to fall. When V CC reaches the UVLO
stop voltage, V STOP (7V), the protection is reset and the
internal high-voltage current source charges the Vcc
capacitor via the Vstr pin. When V CC reaches the UVLO
start voltage, V START (9V), the device resumes normal
operation. In this manner, the auto-restart can
alternately enable and disable the switching of the
power SenseFET until the fault condition is eliminated.
Figure 18. Protection Block
www.fairchildsemi.com
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