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| 型号： | FSH250300-100 |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 150 MHz, QCC36 |
| 封装： | ROHS COMPLIANT PACKAGE-36 |
| 文件页数： | 1/7页 |
| 文件大小： | 576K |
| 代理商： | FSH250300-100 |
INTELLIGENT INTERACTIVE SYNTHESIZER
SURFACE MOUNT MODEL: FSH250300-100
2500 - 3000 MHz
optimized bandwidth
This product is manufactured under one or more of the following patents. Approved: 5,160,810; 5,122,621; 5,390,349; 5,416,449; 5,650,754; 5,805,431; 6,525,623; 6,850,575;
7,088,189; 7,180,381; 7,196,591; 7,262,670; 7,265,642; 7,292,113; 7,365,612; 7,495,525; 2,548,311; 2,548,317; 7,545,229; 7,580,693; 7,586,381; 7,605,670; 7,636,021; 2,533,623
| Pending: 60/493075; 60/501371 & 60/501790; 60/527957 & 60/528670; 60/563481; 60/564173; 60/589090; 60/601823; 60/605791; EV31369834; 11/259766; 60/622485 &
60/710310; 10/937525/60/736901; 60/732787; 7,495,525; 2,548,311; 2,548,317; 7,545,229; 2,563,174; 7,580,693; 7,612,296; 2,524,751
Copyright Synergy Microwave Corporation
201 McLean Boulevard Paterson, New Jersey 07504 USA Tel: (973) 881-8800 Fax: (973) 881-8361
E-Mail: sales@synergymwave.com World Wide Web: http://www.synergymwave.com
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FEATURES:
exceptionally Low phase noise
interactive Communication
Standard programming interface
Ultra wide tuning Range
Lead Free - RohS Compliant
patented ReL-pRo technology
Small Size, Surface mount
buffered output
phase noise
-165
-155
-145
-135
-125
-115
-105
-95
-85
-75
100
1000
10000
100000
1000000
10000000
Offset Frequency (Hz)
Ph
ase
N
oi
se
(
dBc/
H
z)
2500 MHz
2750 MHz
3000 MHz
SPECIFICATIONS (Rev. B 04/04/11)
Frequency
2500 - 3000 MHz
Step Size
1000 kHz
Reference
input Frequency
10 MHz 1
Reference
input Voltage
1.0 V p-p to 3.3 V p-p
bias Voltage
Vcc
V (Vdc)
i (ma max.)
Digital
+5
40
VCO
+10
35
Tune
+24
10
Lock detect indicator
CMOS 3.3 V
output power
+3 dBm (Min.)
Spurious Suppression
90 dB (Typ.)
harmonic Suppression
25 dB (Typ.)
Settling time
10 mSec (Typ.) 2
output impedance
50 Ohms (Nom.)
typical phase noise
offset
phase noise
@ 1 kHz
-87 dBc/Hz
@ 10 kHz
-94 dBc/Hz
@ 100 kHz
-122 dBc/Hz
operating
temperature Range
-40 to +85 °C
programming
See application note AN7100
1
Reference input frequency is programmable (See AN7100) in multiples of the step
size,10 MHz is the factory default setting. 150 MHz (Max.)
2
From the rising edge of LE to stable lock detect
Absolute Maximum Ratings
Storage temp. Range
-55 to +125 C
bias Voltage (digital)
+5.25 V
bias Voltage (tune)
+26 V
bias Voltage (VCo)
+10.5 V
dC Voltage applied to RF out
±25 V
package #
197LF
pin-out
Pin 5 - RF Out
Pin 7 - Lock Detect Out *
Pin 9 - Data In
Pin 10 - Error Flag
Pin 11 - Clock In
Pin 19 - Latch Enable In
Pin 21 - Ref In
Pin 23 - Vcc (Digital)
Pin 24 - Vtune output
Pin 25 - Vcc (VCO)
Pin 26 - Vout (Converter)***
Pin 27 - Vcc(Tune)
Pins 8,12,13,14 - NC
Pins 15,16,17,26,28 - NC
All others Ground
NC = No Connection
* High when locked (source/sink 500 uA)
*** Connect externally. Bypassed with 10 uF 35V tantalum capacitor.
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