参数资料
型号: FT232HQ-REEL
厂商: FTDI, Future Technology Devices International Ltd
文件页数: 36/65页
文件大小: 0K
描述: IC HS USB TO UART/FIFO 48QFN
应用说明: FT1248 Application Note
标准包装: 1
通道数: 1,UART
FIFO's: 4kb
规程: RS232,RS422,RS485
电源电压: 1.62 V ~ 1.98 V,2.97 V ~ 3.63 V
带并行端口:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(8x8)
包装: 标准包装
其它名称: 768-1102-6
Copyright 2012 Future Technology Devices International Limited
41
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
4.10 CPU-style FIFO Interface Mode Description
CPU-style FIFO interface mode is designed to allow a CPU to interface to USB via the FT232H. This mode
is enabled in the external EEPROM. The interface is achieved using a chip select bit (CS#) and address bit
(A0). When the FT232H is in CPU-style Interface mode, the IO signal lines are configured as given in
Table 4.6. This mode uses a combination of CS# and A0 to determine the operation to be carried out.
The following Truth-Table 4.7 gives the decode values for particular operations.
CS#
A0
RD#
WR#
1
X
0
Read Data Pipe
Write Data Pipe
0
1
Read Status
Send Immediate
Table 4.6 CPU-Style FIFO Interface Operation Select
The Status read is shown in Table 4.7
Data Bit
Data
Status
bit 0
1
Data available (=RXF)
bit 1
1
Space available (=TXE)
bit 2
1
Suspend
bit 3
1
Configured
bit 4
X
bit 5
X
bit 6
X
bit 7
X
Table 4.7 CPU-Style FIFO Interface Operation Read Status Description
Note that bits 7 to 4 can be arbitrary values and that X= not used.
The timing of reading and writing in this mode is shown in Figure 4.21 and Table 4.8.
Figure 4.21 CPU-Style FIFO Interface Operation Signal Waveforms.
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