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| 型号： | FT4232HQ-TRAY |
| 厂商： | FTDI, Future Technology Devices International Ltd |
| 文件页数： | 15/45页 |
| 文件大小： | 0K |
| 描述： | IC USB HS QUAD UART/SYNC 64-QFN |
| 标准包装： | 260 |
| 系列： | USBmadeEZ-FIFO |
| 特点： | USB 至 UART 和（或）SPI、I2C、JTAG |
| 通道数： | 4，QUART |
| FIFO's： | 2048 字节 |
| 规程： | RS232，RS422，RS485 |
| 电源电压： | 3 V ~ 3.6 V |
| 带自动流量控制功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘 |
| 供应商设备封装： | 64-QFN 裸露焊盘（9x9） |
| 包装： | 托盘 |
| 配用： | 768-1031-ND - MOD USB HS FT4232H EVAL |
| 其它名称： | FT4232HQ - TRAY |
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Copyright 2010 Future Technology Devices International Limited
22
Document No.: FT_000060
FT4232H QUAD HIGH SPEED USB TO MULTIPURPOSE UART/MPSSE IC
Datasheet Version 2.2
Clearance No.: FTDI#78
4.5 Synchronous and Asynchronous Bit-Bang Interface Mode
Description
The FT4232H channel A,B,C or channel D can be configured as a bit-bang interface. There are two types
of bit-bang modes: synchronous and asynchronous.
Asynchronous Bit-Bang Mode
Asynchronous Bit-Bang mode is the same as BM-style Bit-Bang mode. On any channel configured in
asynchronous bit-bang mode. Data written to the device in the normal manner will be self clocked onto
the parallel I/O data pins (those which have been configured as outputs). Each I/O pin can be
independently set as an input or an output. The rate that the data is clocked out at is controlled by the
baud rate generator.
For the data to change there has to be new data written, and the baud rate clock has to tick. If no new
data is written to the channel, the pins will hold the last value written.
Synchronous Bit-Bang Mode
The synchronous Bit-Bang mode will only update the output parallel I/O port pins whenever
data is sent from the USB interface to the parallel interface. When this is done, data is read from the USB
Rx FIFO buffer and written out on the pins. Data can only be received from the parallel pins (to the USB
Tx FIFO interface) when the parallel interface has been written to.
With Synchronous Bit-Bang mode, data will only be sent out by the FT4232H if there is space in the
FT4232H USB TXFIFO for data to be read from the parallel interface pins. This Synchronous Bit-Bang
mode will read the data bus parallel I/O pins first, before it transmits data from the USB RxFIFO. It is
therefore 1 byte behind the output, and so to read the inputs for the byte that you have just sent,
another byte must be sent.
For example :-
(1) Pins start at 0xFF
Send 0x55,0xAA
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55
(2) Pins start at 0xFF
Send 0x55,0xAA,0xAA
(repeat the last byte sent)
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55,0xAA
Synchronous Bit-Bang Mode differs from Asynchronous Bit-Bang mode in that the device parallel output
is only read when the parallel output is written to by the USB interface. This makes it easier for the
controlling program to measure the response to a USB output stimulus as the data returned to the USB
interface is synchronous to the output data.
Asynchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command. A hex value of 1 will
enable Asynchronous Bit-Bang mode.
Synchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command. A hex value of 4 will
enable Synchronous Bit-Bang mode.
See application note AN2232-02, “Bit Mode Functions for the FT2232” for more details and
examples of using the bit-bang modes.
An example of the synchronous bi-bang mode timing is shown in Figure 4.7 and Table 4.2.
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