参数资料
| 型号： | HD3-6402R-9Z |
| 厂商： | Intersil |
| 文件页数： | 5/7页 |
| 文件大小： | 0K |
| 描述： | IC UART CMOS 5V 2MHZ 40-DIP |
| 标准包装： | 9 |
| 特点： | 低功率 CMOS |
| 通道数： | 8 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 带故障启动位检测功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 通孔 |
| 封装/外壳： | 40-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 40-DIP |
| 包装： | 管件 |
5
Start Bit Detection
The receiver uses a 16X clock timing. The start bit could have
occurred as much as one clock cycle before it was detected,
as indicated by the shaded portion (A). The center of the start
bit is defined as clock count 7 1/2. If the receiver clock is a
symmetrical square wave, the center of the start bit will be
located within
±1/2 clock cycle, ±1/32 bit or 3.125% giving a
receiver margin of 46.875%. The receiver begins searching
for the next start bit at the center of the first stop bit.
Interfacing with the HD-6402
FIGURE 2. RECEIVER TIMING (NOT TO SCALE)
A
B
C
BEGINNING OF FIRST STOP BIT
7 1/2 CLOCK CYCLES
1 CLOCK CYCLE
RRI
RBR1-8, OE, PE
DRR
DR
FE
FIGURE 3. SERIAL DATA FORMAT
LSB
MSB
START BIT
PARITY
IF ENABLED
1, 11/2 OR 2 STOP BITS
5-8 DATA BITS
CLOCK
RRI INPUT
START
71/2 CLOCK CYCLES
81/2 CLOCK CYCLES
COUNT 71/2 DEFINED
CENTER OF START BIT
FIGURE 4.
A
FIGURE 5. TYPICAL SERIAL DATA LINK
DIGITAL
SYSTEM
TRANSMITTER
RECEIVER
RRI
TRO
TBR1
TBR8
CONTROL
HD-6402
CONTROL
RB1
RB8
DIGITAL
SYSTEM
TRANSMITTER
RECEIVER
RRI
TRO
TBR1
TBR8
CONTROL
HD-6402
CONTROL
RB1
RB8
RS232
DRIVER
RS232
RECEIVER
RS232
DRIVER
RS232
RECEIVER
HD-6402
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