参数资料
| 型号： | HD3-6402R-9Z |
| 厂商： | Intersil |
| 文件页数： | 7/7页 |
| 文件大小： | 0K |
| 描述： | IC UART CMOS 5V 2MHZ 40-DIP |
| 标准包装： | 9 |
| 特点： | 低功率 CMOS |
| 通道数： | 8 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 带故障启动位检测功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 通孔 |
| 封装/外壳： | 40-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 40-DIP |
| 包装： | 管件 |
7
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A.C. Testing Input, Output Waveform
Test Circuit
Switching Waveforms
FIGURE 6. DATA INPUT CYCLE
FIGURE 7. CONTROL REGISTER LOAD
CYCLE
FIGURE 8. STATUS FLAG OUTPUT
ENABLE TIME OR DATA
OUTPUT ENABLE TIME
TBR1 - TBR8
VALID DATA
TBRL
(4)
tSET
(2)
tPW
(5)
tHOLD
(5)
tHOLD
(2)
tPW
(4)
tSET
VALID DATA
CLS1, CLS2, SBS, PI, EPE
CRL
(6)
tEN
SFD
RRD
STATUS OR
RBR1 - RBR8
FIGURE 9.
NOTE: A.C. Testing: All input signals must switch between VIL - 50% VIL and VIH + 20% VIH. Input rise and fall times are driven at 1ns/V.
INPUT
VIH + 20% VIH
VIL - 50% VIL
1.5V
OUTPUT
VOH
VOL
FIGURE 10.
NOTE: Includes stray and jig capacitance, CL = 50pF.
OUT
CL
(SEE NOTE)
HD-6402
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