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参数资料
| 型号： | HFA3860BIV96 |
| 厂商： | HARRIS SEMICONDUCTOR |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | nullDirect Sequence Spread Spectrum Baseband Processor |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48 |
| 文件页数： | 13/40页 |
| 文件大小： | 272K |
| 代理商： | HFA3860BIV96 |
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4-13
The bit rate Table 7 shows examples of the bit rates and the
symbol rates and Figure 8 shows the modulation schemes.
The modulator is completely independent from the
demodulator, allowing the PRISM baseband processor to be
used in full duplex operation.
Header/Packet Description
The HFA3860B is designed to handle continuous or
packetized Direct Sequence Spread Spectrum (DSSS) data
transmissions. The HFA3860B generates its own preamble
and header information.
The device uses a synchronization preamble of up to 256
symbols, and a header that includes four fields. The
preamble is all 1’s plus a start frame delimiter (before
entering the scrambler). The actual transmitted pattern of
the preamble will be randomized by the scrambler. The
preamble is always transmitted as a DBPSK waveform.
Start Frame Delimiter (SFD) Field (16 Bits) -
This carries
the synchronization to establish the link frame timing. The
HFA3860B will not declare a valid data packet, even if it PN
acquires, unless it detects the SFD. The HFA3860B receiver
is programmed to time out searching for the SFD via CR15.
The timer starts counting the moment that initial PN
synchronization has been established from the preamble.
The four fields for the header shown in Figure 9 are:
Signal Field (8 Bits) -
This field indicates what data rate the
data packet that follows the header will be. The HFA3860B
receiver looks at the signal field to determine whether it
needs to switch from DBPSK demodulation into DQPSK,
B/QMBOK, or CCK demodulation at the end of the always
DBPSK preamble and header fields.
TABLE 7. BIT RATE TABLE EXAMPLES FOR MCLK = 44MHz
DATA
MODULATION
A/D SAMPLE CLOCK
(MHz)
TX SETUP CR 20
BITS 1, 0
RX STATUS CR 24
BITS 7, 6
DATA RATE
(MBPS)
SYMBOL RATE
(MSPS)
DBPSK
22
00
00
1
1
DQPSK
22
01
01
2
1
BMBOK/CCK
22
10
10
5.5
1.375
QMBOK/CCK
22
11
11
11
1.375
802.11 DSSS BPSK
1 MB/S
BARKER
802.11 DSSS QPSK
2 MB/S
BARKER
5.5 MB/S BMBOK
MODIFIED
WALSH FUNCTIONS
11 MB/S QMBOK
MODIFIED
WALSH FUNCTIONS
DATA
IOUT
QOUT
CHIP
RATE
1 BIT ENCODED TO
ONE OF 2 CODE
WORDS
(TRUE-INVERSE)
2 BITS ENCODED
TO ONE OF
4 CODE WORDS
4 BITS ENCODED TO
ONE OF
16 MODIFIED WALSH
CODE WORDS
8 BITS ENCODED
TO ONE OF 256
MODIFIED WALSH
CODE WORDS
SYMBOL
RATE
I vs Q
11 MC/S
11 MC/S
11 MC/S
11 MC/S
1 MS/S
1 MS/S
1.375 MS/S
1.375 MS/S
11 CHIPS
11 CHIPS
8 CHIPS
8 CHIPS
FIGURE 8. MODULATION MODES
5.5 MB/S CCK
COMPLEX
SPREAD FUNCTIONS
4 BITS ENCODED
TO ONE OF 16
COMPLEX CCK
CODE WORDS
11 MC/S
1.375 MS/S
8 CHIPS
11 MB/S CCK
COMPLEX
SPREAD FUNCTIONS
8 BITS ENCODED
TO ONE OF 256
COMPLEX CCK
CODE WORDS
11 MC/S
1.375 MS/S
8 CHIPS
HFA3860B
相关PDF资料 |
PDF描述 |
|---|---|
| HFA3861BIN | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN96 | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3925IA | null2.4GHz - 2.5GHz 250mW Power Amplifier |
| HFA3925IA96 | null2.4GHz - 2.5GHz 250mW Power Amplifier |
| HFA50PA60C | RxxP2xx Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 15V; Power: 2W; EN 60950 certified, rated for 250VAC; UL-60950-1 / CSA C22.2 certified; 5.2kVDC Isolation for 1 Minute; Optional Continuous Short Circuit Protected; Wide Operating Temperature Range atfull 2 Watts Load, ?40??C to +85??C; Twin Chamber Transformer System; UL94V-0 Package Material; Efficiency to 80% |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HFA3860IV | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HFA3860IV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3860IV96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:11 Mbps Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processo |
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