- 您现在的位置：买卖IC网 > PDF目录371807 > HFA3861AIN (INTERSIL CORP) 288 MACROCELL 3.3 VOLT ISP CPLD PDF资料下载
参数资料
| 型号： | HFA3861AIN |
| 厂商： | INTERSIL CORP |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | 288 MACROCELL 3.3 VOLT ISP CPLD |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP64 |
| 封装： | 10 X 10 MM, PLASTIC, MS-026ACD, TQFP-64 |
| 文件页数： | 28/37页 |
| 文件大小： | 440K |
| 代理商： | HFA3861AIN |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页当前第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页
28
CONFIGURATION REGISTER 26 ADDRESS (34h) R/W AGC TEST MODES
Bits 7
AGC continuous update
0 = disable
1 = allow updates during freeze AGC and AGClock. CR26 bit 3 must be a ‘1’ for this mode to work.
Bit 6
rxRFAGC polarity control.
0 = normal
1 = invert
Bit 5
AGC extra update disable. Allows final update when AGClock is declared
0 = enable an extra update
1 = disable extra update
Bit 4
AGC lock verify
0 = lock verify
1 = disable lock verify
Bit 3
AGC run on freeze- AGC keeps running after acquisition is complete, only signal is updated, no changes to IF or RF gain occur
0 = normal
1 = enabled
Bit 2
AGC override Enable, if set, CR25 controls receiver gain in both RF and IF
0 = normal
1 = enabled
Bit 1
AGC random I/Q allows random data on AGC 6-bit I/Q inputs if PN is enabled
0 = normal
1 = enabled
Bit 0
AGC test math- always accumulates in gain adjust, always outputs mean power from log table.
0 = normal
1 = enabled
CONFIGURATION REGISTER ADDRESS 27 (36h) R/W AGC RF THRESHOLD
Bit 7
RXRF flag
0 = normal
1 = disables threshold
Bits 6:0
AGC threshold (0-64 range)
CONFIGURATION REGISTER ADDRESS 28 (38h) R/W AGC LOW SAT ATTENUATOR
Bits 7:4
Mid sat attenuation (0-30 range). Note: mid sat attenuation is programmed as value times 2. These attenuator steps will occur
if the number of I and Q saturations are greater than the mid and low saturation counts set by CR16.
Bits 3:0
low sat attenuation (0-15 range)
CONFIGURATION REGISTER ADDRESS 29 (3Ah) R/W AGC MINIMUM SIGNAL ATTENUATION
Bits 7:5
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bits 4:0
AGC lock window negative side. (0-15 range) (outer lock window) Note: set as a positive number, logic will convert to negative.
CONFIGURATION REGISTER ADDRESS 30 (3Ch) R/W CARRIER SENSE 2 SCALE FACTOR
Bits 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 5:0
Carrier Sense 2 scale factor (0-7.875 range) (000000 - 100000). Used when DotProduct is source of CS2 calculation
CONFIGURATION REGISTER 31 ADDRESS (3Eh) MANUAL TX POWER CONTROL
Bits 7:1
7 bits to DAC input, -64 to 63 range
Bit 0
unused
HFA3861A
相关PDF资料 |
PDF描述 |
|---|---|
| HFA3863IN | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3863IN96 | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3863 | Direct Sequence Spread Spectrum Baseband Processor(直接序列扩谱基带处理器) |
| HFA3983IV96 | 2.4GHz Power Amplifier and Detector |
| HFA3983 | 2.4GHz Power Amplifier and Detector(2.4GHz 功率放大器探测器) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HFA3861AIN96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processo |
| HFA3861B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861BIN96 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
| HFA3861IV | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor |
发布紧急采购，3分钟左右您将得到回复。