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参数资料
| 型号： | HI5800BID |
| 厂商： | INTERSIL CORP |
| 元件分类： | ADC |
| 英文描述： | 12-Bit, 3MSPS, Sampling A/D Converter |
| 中文描述： | 1-CH 12-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP40 |
| 封装： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件页数： | 3/15页 |
| 文件大小： | 234K |
| 代理商： | HI5800BID |
3
Absolute Maximum Ratings
Thermal Information
Supply Voltages
AV
CC
or DV
CC
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V
AV
EE
or DV
EE
to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
0.3V
Analog Input Pins
Reference Input REF
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . +2.75V
Signal Input V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . .
±
(REF
IN
+0.2V)
RO
ADJ
, RG
ADJ
, ADJ+, ADJ-. . . . . . . . . . . . . . . . . . . . . V
EE
to V
CC
Digital I/O Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND to V
CC
Operating Conditions
Temperature Range
HI5800JCD/KCD . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
HI5800BID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
SBDIP Package . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300
o
C
θ
JA
(
o
C/W)
40
θ
JC
(
o
C/W)
15
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
CC
= +5V, DV
CC
= +5V, AV
EE
= -5V, DV
EE
= -5V; Internal Reference Used,
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
HI5800JCD
HI5800KCD, HI5800BID
0
o
C TO 70
o
C
-40
o
C TO 85
o
C
UNITS
0
o
C TO 70
o
C
MIN
TYP
MAX
MIN
TYP
MAX
SYSTEM PERFORMANCE
Resolution
12
-
-
12
-
-
Bits
Integral Linearity Error, INL
f
S
= 3MHz, f
IN
= 45Hz Ramp
f
S
= 3MHz, f
IN
= 45Hz Ramp
-
0.7
±
2
±
1
-
±
0.5
±
0.3
±
1
±
1
LSB
Differential Linearity Error, DNL
(Guaranteed No Missing Codes)
-
±
0.5
-
LSB
Offset Error, V
OS
(Adjustable to Zero)
(Note 8)
JCD, KCD
-
±
2
±
15
-
±
2
±
3
±
2
±
3
±
15
±
15
±
10
±
15
LSB
BID
-
-
-
-
LSB
Full Scale Error, FSE
(Adjustable to Zero)
(Note 8)
JCD, KCD
-
±
2
±
15
-
LSB
BID
-
-
-
-
LSB
DYNAMIC CHARACTERISTICS
(Input Signal Level 0.5dB Below Full Scale)
Throughput Rate
No Missing Codes
3.0
-
-
3.0
-
-
MSPS
Signal to Noise Ratio (SNR)
f
S
= 3MHz, f
IN
= 20kHz
f
S
= 3MHz, f
IN
= 1MHz
66
69
-
68
71
-
dB
65
67
-
67
69
-
dB
Signal to Noise Ratio (SINAD)
f
S
= 3MHz, f
IN
= 20kHz
f
S
= 3MHz, f
IN
= 1MHz
66
68
-
68
71
-
dB
65
67
-
67
68
-
dB
Total Harmonic Distortion, THD
f
S
= 3MHz, f
IN
= 20kHz
f
S
= 3MHz, f
IN
= 1MHz
f
S
= 3MHz, f
IN
= 20kHz
f
S
= 3MHz, f
IN
= 1MHz
f
S
= 3MHz, f
1
= 49kHz,
f
2
= 50kHz (Note 3)
f
S
= 1MHz
f
S
= 1MHz
(Note 3)
-
-74
-70
-
-85
-74
dBc
-
-70
-68
-
-77
-70
dBc
Spurious Free Dynamic Range,
SFDR
71
76
-
76
86
-
dBc
68
72
-
71
77
-
dBc
Intermodulation Distortion, IMD
-
-74
-66
-
-79
-70
dBc
Differential Gain
-
0.9
-
-
0.9
-
%
Differential Phase
-
0.05
-
-
0.05
-
Degrees
Aperture Delay, t
AD
-
12
20
-
12
20
ns
=-------------------------------
=
RMS Noise + Distortion
HI5800
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HI5800-EV | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HI5800JCD | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:12-Bit, 3MSPS, Sampling A/D Converter |
| HI5800KCD | 制造商:Rochester Electronics LLC 功能描述:40 SBDIP COMTEMP A/D 12BIT 3MSPS 1.0 LSB SMP&HLD V-REF - Bulk 制造商:Harris Corporation 功能描述: |
| HI5801 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:ADVANCE INFORMATION |
| HI5801AIJ | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:ADVANCE INFORMATION |
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