参数资料
| 型号： | HI7191IBZ-T |
| 厂商： | Intersil |
| 文件页数： | 6/25页 |
| 文件大小： | 0K |
| 描述： | CONV A/D 24BIT SIGMA/DLTA 20SOIC |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| 位数： | 24 |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 32.5mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC W |
| 包装： | 标准包装 |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
| 其它名称： | HI7191IBZ-TDKR |
14
FN4138.8
June 1, 2006
Scale Calibration Register, and 800000 (h) to the Negative
Full Scale Calibration Register. This sets the offset
correction factor to 0 and both the positive and negative gain
slope factors to 1.
The HI7191 offers several different modes of Self-Calibration
and System Calibration. For calibration to occur, the on-chip
microcontroller must convert the modulator output for three
different input conditions - “zero-scale,” “positive full scale,”
and “negative full scale”. With these readings, the HI7191
can null any offset errors and calculate the gain slope factor
for the transfer function of the converter. It is imperative that
the zero-scale calibration be performed before either of the
gain calibrations. However, the order of the gain calibrations
is not important.
The calibration modes are user selectable in the Control
Register by using the MD bits (MD2-MD0) as shown in
Table 6. DRDY will go low indicating that the calibration is
complete and there is valid data at the output.
Conversion Mode
For Conversion Mode operation the HI7191 converts the
differential voltage between VINHI and VINLO . From
switching into this mode it takes 3 conversion periods (3 x
1/fN) for DRDY to go low and new data to be valid. No
calibration coefficients are generated when operating in
Conversion Mode as data is calibrated using the existing
calibration coefficients.
Self-Calibration Mode
Please note: Self-calibration is only valid when
operating in a gain of one. In addition, the offset and
gain errors are not reduced as with the full system
calibration.
The Self-Calibration Mode is a three step process that
updates the Offset Calibration Register, the Positive Full
Scale Calibration Register, and the Negative Full Scale
Calibration Register. In this mode an internal offset
calibration is done by disconnecting the external inputs and
shorting the inputs of the PGIA together. After 3 conversion
periods the Offset Calibration Register is updated with the
value that corrects any internal offset errors.
After the offset calibration is completed the Positive and
Negative Full Scale Calibration Registers are updated. The
inputs VINHI and VINLO are disconnected and the external
reference is applied across the modulator inputs. The
HI7191 then takes 3 conversion cycles to sample the data
and update the Positive Full Scale Calibration Register. Next
the polarity of the reference voltage across the modulator
input terminals is reversed and after 3 conversion cycles the
Negative Full Scale Calibration Register is updated. The
values stored in the Positive and Negative Full Scale
Calibration Registers correct for any internal gain errors in
the A/D transfer function. After 3 more conversion cycles the
DRDY line will activate signaling that the calibration is
complete and valid data is present in the Data Output
Register.
System Offset Calibration Mode
The System Offset Calibration Mode is a single step process
that allows the user to lump offset errors of external circuitry
and the internal errors of the HI7191 together and null them
out. This mode will convert the external differential signal
applied to the VIN inputs and then store that value in the
Offset Calibration Register. The user must apply the zero
point or offset voltage to the HI7191 analog inputs and allow
the signal to settle before selecting this mode. After 4
conversion periods the DRDY line will activate signaling that
the calibration is complete and valid data is present in the
Data Output Register.
System Positive Full Scale Calibration Mode
The System Positive Full Scale Calibration Mode is a single
step process that allows the user to lump gain errors of
external circuitry and the internal errors of the HI7191
together and null them out. This mode will convert the
external differential signal applied to the VIN inputs and
stores the converted value in the Positive Full Scale
Calibration Register. The user must apply the +Full Scale
voltage to the HI7191 analog inputs and allow the signal to
settle before selecting this mode. After 4 conversion periods
the DRDY line will activate signaling the calibration is
complete and valid data is present in the Data Output
Register.
System Negative Full Scale Calibration Mode
The System Negative Full Scale Calibration Mode is a
single-step process that allows the user to lump gain errors
of external circuitry and the internal errors of the HI7191
together and null them out. This mode will convert the
external differential signal applied to the VIN inputs and
stores the converted value in the Negative Full Scale
Calibration Register. The user must apply the -Full Scale
voltage to the HI7191 analog inputs and allow the signal to
settle before selecting this mode. After 4 conversion periods
the DRDY line will activate signaling the calibration is
complete and valid data is present in the Data Output
Register.
TABLE 4. HI7191 OPERATIONAL MODES
MD2
MD1
MD0
OPERATIONAL MODE
0
Conversion
0
1
Self Calibration (Gain of 1 only)
0
1
0
System Offset Calibration
0
1
System Positive Full Scale Calibration
1
0
System Negative Full Scale Calibration
1
0
1
System Offset/Internal Gain Calibration
(Gain of 1 only)
1
0
System Gain Calibration
111
Reserved
HI7191
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