参数资料
型号: HIP4020IBZ
厂商: Intersil
文件页数: 5/9页
文件大小: 0K
描述: IC DRIVER FULL-BRIDGE 20-SOIC
标准包装: 38
配置: 半桥
输入类型: 反相和非反相
延迟时间: 2.5µs
电流 - 峰: 625mA
配置数: 1
输出数: 4
电源电压: 3 V ~ 12 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC W
包装: 管件
产品目录页面: 1239 (CN2011-ZH PDF)
HIP4020
V+
V DD
B1
BRAKE
OFF
ON
B2
ENB
CONTROL
LOGIC B
Q1
D1
D3
Q3
DIRECTION
A1
Q2
D2
D4
Q4
ENABLE
A2
ENA
CONTROL
LOGIC A
V SS
V SSA
OUTA
OUTB
V SSB
ILF
(LOGIC
GROUND)
LOAD
V-
FIGURE 1. TYPICAL MOTOR CONTROL APPLICATION CIRCUIT SHOWING DIRECTIONAL AND BRAKING CONTROL
TRUTH TABLE
SWITCH DRIVER A
SWITCH DRIVER B
V EN
50%
INPUTS
A1 A2 ENA
OUTPUT
OUTA
INPUTS
B1 B2 ENB
OUTPUT
OUTB
V OUT
t PLH
10%
90%
50%
H
L
L
L
H
H
OH
OL
L
H
L
L
H
H
OH
OL
t r
H
H
H
OL
L
H
H
OL
V EN
50%
L H H OL H H
X X L Z X X
L = Low logic level; H = High logic level
H
L
OL
Z
V OUT
t PHL
10%
90%
50%
Z = High Impedance (off state)
OH = Output High (sourcing current to the output terminal)
OL = Output Low (sinking current from the output terminal)
X = Don’t Care
Application
The HIP4020 is designed to detect load current feedback
from sampling resistors of low value in the source
connections of the output drivers to V DD , V SSA and V SSB
(See Figure 1). When the sink or source current at OUTA or
OUTB exceeds the preset OC (Overcurrent) limiting value of
550mA typical, the current is held at the limiting value. If the
OT (Over-Temperature) Shutdown Protection limit is
exceeded, temperature sensing BiMOS circuits limit the
junction temperature to 150°C typical.
5
t f
SWITCHING WAVEFORMS
FIGURE 2.
The circuit of Figure 1 shows the Full H-Switch in a small motor-
drive application. The left (A) and right (B) H-Switch’s are
controlled from the A and B inputs via the A and B CONTROL
LOGIC to the MOS output transistors Q1, Q2, Q3 and Q4. The
circuit is intended to safely start, stop, and control rotational
direction for a motor requiring no more than 0.5A of supply
current. The stop function includes a Dynamic Braking feature.
With the ENABLE Inputs Low, the MOS transistors Q1 and Q3
are OFF; which cuts-off supply current to OUTA and OUTB.
With the BRAKE terminal Low and ENABLE Inputs High, either
Q1 and Q4 or Q3 and Q2 will be driven into conduction by the
FN3976.3
December 20, 2005
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