参数资料
| 型号： | HIP6007CB-T |
| 厂商： | Intersil |
| 文件页数： | 6/10页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM STD BUCK 14-SOIC |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel Pentium? Pro、PowerP、Alpha |
| 输入电压： | 2.5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 1.27 V ~ 12 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 14-SOICN |
| 包装： | 管件 |
HIP6007
V IN
4V
2V
HIP6007
0V
15A
10A
UGATE
PHASE
Q1
D2
C IN
L O
C O
V OUT
5A
0A
RETURN
TIME (20ms/DIV)
FIGURE 5. PRINTED CIRCUIT BOARD
r DS ( ON )
FIGURE 4. OVER-CURRENT OPERATION
The over-current function will trip at a peak inductor current
(I PEAK ) determined by:
I OCSET ? R OC SET
I PEAK = ---------------------------------------------------
where I OCSET is the internal OCSET current source (200 μ A
- typical). The OC trip point varies mainly due to the
MOSFET’s r DS(ON) variations. To avoid over-current
tripping in the normal operating load range, find the R OCSET
resistor from the equation above with:
1. The maximum r DS(ON) at the highest junction tempera-
ture.
2. The minimum I OCSET from the specification table.
3. Determine I PEAK for I PEAK > I OU T ( MAX ) + ( ? I ) ? 2 ,
where ? I is the output inductor ripple current.
POWER AND GROUND PLANES OR ISLANDS
of ground or power plane in a printed circuit board. The
components shown in Figure 6 should be located as close
together as possible. Please note that the capacitors C IN
and C O each represent numerous physical capacitors.
Locate the HIP6007 within 3 inches of the MOSFETs, Q1.
The circuit traces for the MOSFETs’ gate and source
connections from the HIP6007 must be sized to handle up to
1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, C ss
close to the SS pin because the internal current source is
only 10 μ A. Provide local V CC decoupling between VCC and
GND pins. Locate the capacitor, C BOOT as close as
practical to the BOOT and PHASE pins.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
A small ceramic capacitor should be placed in parallel with
R OCSET to smooth the voltage across R OCSET in the
presence of switching noise on the input voltage.
Application Guidelines
SS
HIP6007
BOOT
C BOOT
PHASE
V CC
+12V
D1
+V IN
Q1 L O
D2 C O
V OUT
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
C SS
GND
C VCC
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be part
136
FIGURE 6. PRINTED CIRCUIT BOARD
SMALL SIGNAL LAYOUT GUIDELINES
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