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参数资料
| 型号： | HIP6016 |
| 厂商： | Intersil Corporation |
| 元件分类： | FPGA |
| 英文描述： | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 先进的双PWM和线性功率控制 |
| 文件页数： | 12/14页 |
| 文件大小： | 130K |
| 代理商： | HIP6016 |
2-207
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching regulator applications for the bulk capacitors. The
bulk capacitor’s ESR determines the output ripple voltage
and the initial voltage drop after a high slew-rate transient.
An aluminum electrolytic capacitor’s ESR value is related to
the case size with lower ESR available in larger case sizes.
However, the equivalent series inductance of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient
loading. Unfortunately, ESL is not a specified parameter.
Work with your capacitor supplier and measure the
capacitor’s impedance with frequency to select suitable
components. In most cases, multiple electrolytic capacitors
of small case size perform better than a single large case
capacitor. For a given transient load magnitude, the output
voltage transient response due to the output capacitor
characteristics can be approximated by the following
equation:
Linear Output Capacitors
The output capacitors for the linear regulator and the linear
controller provide dynamic load current. The linear controller
uses dominant pole compensation integrated in the error
amplifier and is insensitive to output capacitor selection.
Capacitor, C
OUT3
should be selected for transient load
regulation.
The output capacitor for the linear regulator provides loop
stability. The linear regulator (OUT2) requires an output
capacitor characteristic shown in Figure 13. The upper line
plots the 45 phase margin with 150mA load and the lower
line is the 45 phase margin limit with a 10mA load. Select a
C
OUT2
capacitor with characteristic between the two limits.
Output Inductor Selection
The PWM converter requires an output inductor. The output
inductor is selected to meet the output voltage ripple
requirements and sets the converter’s response time to a
load ntransient. The inductor value determines the
converter’s ripple current and the ripple voltage is a function
of the ripple current. The ripple voltage and current are
approximated by the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
HIP6016 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
interval required to slew the inductor current from an initial
current value to the post-transient current level. During this
interval the difference between the inductor current and the
transient current level must be supplied by the output
capacitors. Minimizing the response time can minimize the
output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
where: I
TRAN
is the transient load current step, t
RISE
is the
response time to the application of load, and t
FALL
is the
response time to the removal of load. With a 5V input
source, the worst case response time can be either at the
application or removal of load, and dependent upon the
output voltage setting. Be sure to check both of these
equations at the minimum and maximum output levels for the
worst case response time.
Input Capacitor Selection
The important parameters for the bulk input capacitor are the
voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25 times greater than the maximum input
voltage and a voltage rating of 1.5 times is a conservative
guideline.
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use ceramic capacitance
for the high frequency decoupling and bulk capacitors to
supply the RMS current. Small ceramic capacitors should be
VTRAN
ESL
dIdt
×
ESR
ITRAN
×
+
=
10
1000
100
0.1
0.2
0.3
0.4
0.5
0.6
0.7
CAPACITANCE (
μ
F)
ESR (
)
FIGURE 13. C
OUT2
OUTPUT CAPACITOR
STABLE
I
VIN
VOUT
LO
–
FS
×
VIN
×
=
VOUT
I
ESR
×
=
tRISE
ITRAN
VOUT
×
–
VIN
=
tFALL
LO
ITRAN
VOUT
×
=
HIP6016
相关PDF资料 |
PDF描述 |
|---|---|
| HIP6016CB | Advanced PWM and Dual Linear Power Control |
| HIP6017B | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP6017BCB | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP6018B | 100,000 System Gate FPGA - NOT RECOMMENDED for NEW DESIGN |
| HIP6018BCB | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP6016 WAF | 制造商:Intersil Corporation 功能描述: |
| HIP6016CB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP6016CB WAF | 制造商:Harris Corporation 功能描述: |
| HIP6016CB-T | 制造商:Rochester Electronics LLC 功能描述:ADVANCED PWM & CONTROL "3 IN 1"& 1.5V OUTPUTS T&R - Bulk |
| HIP6017 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Advanced PWM and Dual Linear Power Control |
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