- 您现在的位置：买卖IC网 > PDF目录371822 > HIP6521EVAL1 (Intersil Corporation) PWM and Triple Linear Power Controller PDF资料下载
参数资料
| 型号： | HIP6521EVAL1 |
| 厂商： | Intersil Corporation |
| 元件分类： | 基准电压源/电流源 |
| 英文描述： | PWM and Triple Linear Power Controller |
| 中文描述： | PWM和三线性功率控制器 |
| 文件页数： | 11/13页 |
| 文件大小： | 154K |
| 代理商： | HIP6521EVAL1 |
11
placed very close to the upper MOSFET to suppress the
voltage induced in the parasitic circuit impedances.
For a through-hole design, several electrolytic capacitors
may be needed. For surface mount designs, solid tantalum
capacitors can be used, but caution must be exercised with
regard to the capacitor surge current rating. These
capacitors must be capable of handling the surge-current at
power-up.
Transistors Selection/Considerations
The HIP6521 requires 5 external transistors. Two N-channel
MOSFETs are used in the synchronous-rectified buck
topology of PWM converter. The clock, AGP and MCH/ICH
linear controllers each drive an NPN bipolar transistor as a
pass element. All these transistors should be selected based
upon r
DS(ON)
, current gain, saturation voltages, gate/base
supply requirements, and thermal management
considerations.
PWM MOSFET Selection and Considerations
In high-current PWM applications, the MOSFET power
dissipation, package selection and heatsink are the
dominant design factors. The power dissipation includes two
loss components; conduction loss and switching loss. These
losses are distributed between the upper and lower
MOSFETs according to duty factor (see the equations
below). The conduction losses are the main component of
power dissipation for the lower MOSFETs. Only the upper
MOSFET has significant switching losses, since the lower
device turns on and off into near zero voltage.
The equations below assume linear voltage-current
transitions and do not model power loss due to the reverse-
recovery of the lower MOSFET’s body diode. The gate-
charge losses are dissipated by the HIP6521 and don't heat
the MOSFETs. However, large gate-charge increases the
switching time, t
SW
which increases the upper MOSFET
switching losses. Ensure that both MOSFETs are within their
maximum junction temperature at high ambient temperature
by calculating the temperature rise according to package
thermal-resistance specifications. A separate heatsink may
be necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
Given the reduced available gate bias voltage (5V) logic-
level or sub-logic-level transistors have to be used for both
N-MOSFETs. Caution should be exercised with devices
exhibiting very low V
GS(ON)
characteristics, as the low gate
threshold could be conducive to some shoot-through (due to
the Miller effect), in spite of the counteracting circuitry
present aboard the HIP6521.
Rectifier CR1 is a clamp that catches the negative inductor
swing during the dead time between the turn off of the lower
MOSFET and the turn on of the upper MOSFET. The diode
must be a Schottky type to prevent the lossy parasitic
MOSFET body diode from conducting. It is acceptable to
omit the diode and let the body diode of the lower MOSFET
clamp the negative inductor swing, providing the body diode
is fast enough to avoid excessive negative voltage swings at
the PHASE pin. The diode's rated reverse breakdown
voltage must be greater than the maximum input voltage.
Linear Controllers Transistor Selection
The main criteria for selection of transistors for the linear
regulators is package selection for efficient removal of heat.
The power dissipated in a linear regulator is:
Select a package and heatsink that maintains the junction
temperature below the rating with a the maximum expected
ambient temperature.
As bipolar NPN transistors have to be used with the linear
controllers, insure the current gain at the given operating
V
CE
is sufficiently large to provide the desired maximum
output load current when the base is fed with the minimum
driver output current.
P
UPPER
I
------------------------------------------------------------
2
r
IN
×
V
×
I
----------------------------------------------------
V
×
t
×
F
S
×
+
=
P
LOWER
I
--------------------------------------------------------------------------------
2
r
IN
×
V
V
–
(
)
×
=
FIGURE 8. MOSFET GATE BIAS
+5V
PGND
HIP6521
GND
LGATE
UGATE
PHASE
BOOT
+5V OR LESS
NOTE:
V
GS
≈
V
CC
-0.5V
NOTE:
V
GS
≈
V
CC
Q1
Q2
+
-
CR1
VCC
C
BOOT
VCC
+
P
LINEAR
I
O
V
IN
V
OUT
–
(
)
×
=
HIP6521
相关PDF资料 |
PDF描述 |
|---|---|
| HIP6602BCRZ-T | Dual Channel Synchronous Rectified Buck MOSFET Driver |
| HIP6602BCRZA | Dual Channel Synchronous Rectified Buck MOSFET Driver |
| HIP6602BCRZA-T | Dual Channel Synchronous Rectified Buck MOSFET Driver |
| HIP6602B | Dual Channel Synchronous Rectified Buck MOSFET Driver |
| HIP6602BCBZ-T | Dual Channel Synchronous Rectified Buck MOSFET Driver |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP6601 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Synchronous-Rectified Buck MOSFET Drivers |
| HIP6601_04 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Synchronous-Rectified Buck MOSFET Drivers |
| HIP6601A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Synchronous Rectified Buck MOSFET Drivers |
| HIP6601ACB | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Synchronous Rectified Buck MOSFET Drivers |
| HIP6601ACB-T | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
发布紧急采购，3分钟左右您将得到回复。