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参数资料
| 型号： | HSC-ADC-EVALB-DCZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL ADC FIFO DUAL-CH USB HS |
| 设计资源： | Very Low Jitter Encode (Sampling) Clocks for High Speed Analog-to-Digital Converters Using ADF4002 (CN0003) |
| 标准包装： | 1 |
| 附件类型： | ADC 接口板 |
| 适用于相关产品： | 双路模数转换器型 |
| 产品目录页面： | 781 (CN2011-ZH PDF) |
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HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC
EVALUATION BOARD
The FIFO provides all of the support circuitry required to
accept two channels of an ADC’s digital parallel CMOS outputs.
Each of the various functions and configurations can be selected by
proper connection of various jumpers (see Table 5). When
using this in conjunction with an ADC evaluation board, it is
critical that the signal sources used for the analog input and
clock have very low phase noise (<1 ps rms jitter) to realize the
ultimate performance of the converter. Proper filtering of the
analog input signal to remove harmonics and lower the integrated
or broadband noise at the input is also necessary to achieve the
specified noise performance.
See Figure 5 to Figure 15 for complete schematics and layout plots.
POWER SUPPLIES
The FIFO board is supplied with a wall mount switching power
supply that provides a 6 V, 2 A maximum output. Connect the
When operating the evaluation board in a non-default
condition, J316 can be removed to disconnect the switching
power supply. This enables the user to bias the board
independently. Use P302 to connect an independent supply to
the board. A 3.3 V supply is needed with at least a 1 A current
capability.
CONNECTION AND SETUP
The FIFO board has a 120-pin (40-pin, triple row) connector
that accepts two 16-bit channels of parallel CMOS inputs (see
Figure 6). For those ADC evaluation boards that have only an
80-pin (40-pin, double row) connector, it is pertinent for the
lower two rows of the FIFO’s triple row connector to be connected
in order for the data to pass to either FIFO channel correctly.
The top or third row is used to pass SPI signals across to the
adjacent ADC evaluation board that supports this feature.
supply to the rated 100 ac to 240 ac wall outlet at 47 Hz to 63 Hz.
The other end is a 2.1 mm inner diameter jack that connects to
the PCB at J301. On the PC board, the 6 V supply is then fused
and conditioned before connecting to the low dropout 3.3 V
linear regulator that supplies the proper bias to the entire board.
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
3.3V
SWITCHING
POWER
SUPPLY
6V DC
2A MAX
CHB
–
+
PARALLEL
CMOS
ROHDE & SCHWARZ,
SMHU,
2V p-p SIGNAL
SYNTHESIZER
ROHDE & SCHWARZ,
SMHU,
2V p-p SIGNAL
SYNTHESIZER
BAND-PASS
FILTER
OUTPUTS
EVALUATION
BOARD
XFMR
INPUT CHB
PARALLEL
CMOS
OUTPUTS
CLK
SPI
HSC-ADC-EVALB-DC
FIFO DATA
CAPTURE
BOARD
USB
CONNECTION
SPI
PC
RUNNING
ADC
ANALYZER
SPI
Figure 4. Example Setup Using Quad ADC Evaluation Board and FIFO Data Capture Board
Rev. 0 | Page 13 of 28
相关PDF资料 |
PDF描述 |
|---|---|
| HSC-ADC-EVALCZ | KIT EVAL ADC FIFO HI SPEED |
| HSHM-GUIDE-PIN-4 | CONN GUIDE PIN 8-32 UNC-2A |
| HSHM-GUIDE-SOCKET-1 | CONN HSHM GUIDE SOCKET 1 |
| HTC-10M | FUSEBLOCK 250V FOR 5X20 FUSE UL |
| HV275C | GAS TUBE GDT 3KA 2750V CORE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HSC-ADC-EVALB-SC | 制造商:Analog Devices 功能描述:FPGA BOARD FOR HSC ADCS - Bulk 制造商:Rochester Electronics LLC 功能描述: |
| HSC-ADC-EVALCZ | 功能描述:KIT EVAL ADC FIFO HI SPEED RoHS:是 类别:编程器，开发系统 >> 配件 系列:- 标准包装:1 系列:- 附件类型:适配器板 适用于相关产品:RCB230，RCB231，RCB212 配用:26790D-ND - RCB BREAKOUT BOARD RS232 CABLE |
| HSC-ADC-EVALCZ | 制造商:Analog Devices 功能描述:EVALUATION KIT ((NS)) |
| HSC-ADC-EVALDZ | 功能描述:数据转换 IC 开发工具 Data Converter Evaluation Platform RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| HSC-ADC-EVAL-SC | 制造商:Analog Devices 功能描述:FIFO BOARD FOR HSC A-D CONVERTERS - Bulk 制造商:Analog Devices 功能描述:EVALUTION KITSINGLE CHANNEL ((NS)) |
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