参数资料
型号: HUF75652G3
厂商: Fairchild Semiconductor
文件页数: 2/10页
文件大小: 0K
描述: MOSFET N-CH 100V 75A TO-247
产品培训模块: High Voltage Switches for Power Processing
产品变化通告: Lead Frame Change 20/Dec/2007
产品目录绘图: MOSFET TO-247 Pkg
标准包装: 150
系列: UltraFET™
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 100V
电流 - 连续漏极(Id) @ 25° C: 75A
开态Rds(最大)@ Id, Vgs @ 25° C: 8 毫欧 @ 75A,10V
Id 时的 Vgs(th)(最大): 4V @ 250µA
闸电荷(Qg) @ Vgs: 475nC @ 20V
输入电容 (Ciss) @ Vds: 7585pF @ 25V
功率 - 最大: 515W
安装类型: 通孔
封装/外壳: TO-247-3
供应商设备封装: TO-247
包装: 管件
产品目录页面: 1605 (CN2011-ZH PDF)
HUF75652G3
Electrical Specifications
T C = 25 o C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
BV DSS
I DSS
I GSS
I D = 250 μ A, V GS = 0V (Figure 11)
V DS = 95V, V GS = 0V
V DS = 90V, V GS = 0V, T C = 150 o C
V GS = ± 20V
100
-
-
-
-
-
-
-
-
1
250
± 100
V
μ A
μ A
nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
V GS(TH)
r DS(ON)
V GS = V DS , I D = 250 μ A (Figure 10)
I D = 75A, V GS = 10V (Figures 9)
2
-
-
0.0067
4
0.008
V
?
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to
R θ JC
R θ JA
TO-247
-
-
-
-
0.29
30
o C/W
o C/W
Ambient
SWITCHING SPECIFICATIONS (V GS = 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
t ON
t d(ON)
t r
t d(OFF)
t f
t OFF
V DD = 50V, I D = 75A, V GS = 10V, R GS = 2.0 ?
-
-
-
-
-
-
-
18.5
195
80
190
-
320
-
-
-
-
410
ns
ns
ns
ns
ns
ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Q g(TOT)
Q g(10)
Q g(TH)
Q gs
Q gd
V GS = 0V to 20V
V GS = 0V to 10V
V GS = 0V to 2V
V DD = 50V,
I D = 75A,
I g(REF) = 1.0mA
(Figure 13)
-
-
-
-
-
393
211
14
26
74
475
255
16.5
-
-
nC
nC
nC
nC
nC
CAPACITANCE SPECIFICATIONS
Input Capacitance
C ISS
V DS = 25V, V GS = 0V,
-
7585
-
pF
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
C OSS
C RSS
(Figure 12)
-
-
2345
630
-
-
pF
pF
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
SYMBOL
V SD
t rr
Q RR
TEST CONDITIONS
I SD = 75A
I SD = 35A
I SD = 75A, dI SD /dt = 100A/ μ s
I SD = 75A, dI SD /dt = 100A/ μ s
MIN
-
-
-
-
TYP
-
-
-
-
MAX
1.25
1.00
150
490
UNITS
V
V
ns
nC
?2001 Fairchild Semiconductor Corporation
HUF75652G3 Rev. C0
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