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参数资料
| 型号： | HUF76423P3 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 7/10页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 60V 35A TO-220AB |
| 产品培训模块： | High Voltage Switches for Power Processing |
| 标准包装： | 400 |
| 系列： | UltraFET™ |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 60V |
| 电流 - 连续漏极(Id) @ 25° C： | 35A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 30 毫欧 @ 35A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 34nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 1060pF @ 25V |
| 功率 - 最大： | 85W |
| 安装类型： | 通孔 |
| 封装/外壳： | TO-220-3 |
| 供应商设备封装： | TO-220AB |
| 包装： | 管件 |
| 其它名称： | HUF76423P3-ND HUF76423P3FS |
HUF76423P3
PSPICE Electrical Model
.SUBCKT HUF76423 2 1 3 ;
CA 12 8 1.46e-9
CB 15 14 1.46e-9
CIN 6 8 1.0e-9
rev 7 September 1999
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
10
DPLCAP
5
LDRAIN
DRAIN
2
ESLC
EBREAK 11 7 17 18 66.0
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
RSLC2
RSLC1
51
5
51
DBREAK
11
RLDRAIN
9
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 5.5e-9
LSOURCE 3 7 4.4e-9
MMED 16 6 8 8 MMEDMOD
GATE
1
LGATE
RLGATE
-
ESG
+
EVTEMP
RGATE + 18 -
22
20
6
8
6
EVTHRES
+ 19 -
8
50
RDRAIN
16
21
MMED
MSTRO
+
17
EBREAK 18
-
MWEAK
DBODY
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
CIN
8
7
LSOURCE
SOURCE
3
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 7.0e-3
RSOURCE
RLSOURCE
RGATE 9 20 3.6
RLDRAIN 2 5 10
RLGATE 1 9 55
12
S1A
13
8
S2A
14
13
15
17
RBREAK
18
RLSOURCE 3 7 44
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 1.45e-2
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
CA
S1B
13
+
EGS
6
8
S2B
CB
+
EDS
5
8
14
IT
RVTEMP
19
-
VBAT
+
S1A
S1B
S2A
6 12 13 8 S1AMOD
13 12 13 8 S1BMOD
6 15 14 13 S2AMOD
-
-
8
RVTHRES
22
S2B
13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*100),3.5))}
.MODEL DBODYMOD D (IS = 6.3e-13 RS = 6.8e-3 TRS1 = 1e-3 TRS2 = 1e-6 XTI = 4.3 CJO = 1.28e-9 TT = 5.1e-8 M = 0.5)
.MODEL DBREAKMOD D (RS = 2.9e- 1TRS1 = 1e- 4TRS2 = 0)
.MODEL DPLCAPMOD D (CJO = 9.5e-1 0IS = 1e-3 0N = 10 M = 0.82)
.MODEL MMEDMOD NMOS (VTO = 2.10 KP = 6 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6)
.MODEL MSTROMOD NMOS (VTO = 2.45 KP = 60.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.79 KP = 0.13 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 36 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 1.2e- 3TC2 = -5e-7)
.MODEL RDRAINMOD RES (TC1 = 1.3e-2 TC2 = 3.1e-5)
.MODEL RSLCMOD RES (TC1 = 5.5e-3 TC2 = 7e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6)
.MODEL RVTHRESMOD RES (TC1 = -1.8e-3 TC2 = -5.8e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.7e- 3TC2 = 8e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5
.MODEL S1BMOD VSWITCH (RON = 1e-5
.MODEL S2AMOD VSWITCH (RON = 1e-5
.MODEL S2BMOD VSWITCH (RON = 1e-5
ROFF = 0.1
ROFF = 0.1
ROFF = 0.1
ROFF = 0.1
VON = -4.8 VOFF= -2.8)
VON = -2.8 VOFF= -4.8)
VON = -0.6 VOFF= 0.5)
VON = 0.5 VOFF= -0.6)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options ; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
?2001 Fairchild Semiconductor Corporation
HUF76423P3 Rev. C0
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