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参数资料
| 型号： | HW-PC4 |
| 厂商： | Xilinx Inc |
| 文件页数： | 5/9页 |
| 文件大小： | 0K |
| 描述： | CABLE PROGRAMMING FOR XILINX DEV |
| 产品变化通告： | Development Systems Discontinuation 11/Jan/2010 |
| 标准包装： | 1 |
| 附件类型： | 编程缆线 |
| 适用于相关产品： | Xilinx FPGA、CPLDS、平台闪存 PROM、XC18V00 PROM、系统 ACE MPM |
| 其它名称： | 122-1276 HW-PC4-ND |
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Table 2: PC4 Target Interface Connector Signal Assignments (Cont’d)
Xilinx Parallel Cable IV
JTAG
GND
Pin Name (1)
Slave
Serial
GND
SPI
GND
Type
–
Flying
Lead
Wires
6
Ribbon
Cable
1 (3) , 3, 5,
7, 9, 11,
13
Description
Digital Ground . Xilinx recommends that all odd-numbered pins on
the ribbon cable connector (pins 1 (1) , 3, 5, 7, 9, 11, and 13) be
connected to digital ground. Minimum crosstalk is achieved when
using all grounds.
Notes:
1.
2.
3.
Pins not listed are no connects.
The listed SPI pin names match those of SPI flash memories from STMicroelectronics. Pin names of compatible SPI devices from other
vendors can be different. Consult the vendor's SPI device data sheet for corresponding pin names.
Caution! The PROG_B pin of the FPGA, which is connected to a target SPI device, must be asserted Low during SPI programming to
ensure the FPGA does not contend with the SPI programming operation.
Pin 1 must not be isolated from the target system digital ground for use as a cable attachment identifier. Pin 1 is a virtual ground used for
diagnostic purposes. This virtual ground is biased through a resistor network. For normal operation, Pin 1 must be connected to the target
system digital ground.
Caution! Pin 1 must not be the only digital ground pin attached to the target system digital ground plane.
DS097 (v2.5) May 14, 2008
Product Specification
5
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