参数资料
型号: HW-SD3400A-DSP-DB-UNI-G-J
厂商: Xilinx Inc
文件页数: 18/50页
文件大小: 0K
描述: KIT DEVELOPMENT SPARTAN 3ADSP
标准包装: 1
系列: Spartan®-3A
类型: DSP FPGA
适用于相关产品: Spartan?-3A DSP 3400A
所含物品: 板 - 不包括电源 -
Chapter 1: Introduction
R
4. AC'97 SoundMAX Codec
Analog Devices AD1981B. The device supports 16-bit stereo audio and sampling rates
up to 48 kHz. The sampling rate for recording and playback can also be different.
Table 1-2 defines the pin assignments.
Table 1-2:
AC'97 SoundMAX Codec Interface Pin Assignments
FPGA Pin
AC14
AC15
AB6
AD14
W15
Description
CODEC_BIT_CLK
CODEC_RESET_B
CODEC_SDATA_IN
CODEC_SDATA_OUT
CODEC_SYNC
5. DVI Connector
Used to connect an external video monitor (DVI or VGA) to the Spartan-3A DSP 3400A
Edition board. Table 1-3 defines the pin assignments.
Note : The VGA monitor can be connected to the development board with a
DVI-to-VGA adaptor (sold separately).
Table 1-3:
DVI Interface Pin Assignments
FPGA Pin
AE7
AE6
AC8
AD7
AB7
AF5
AA10
W10
Y10
V11
Description
DVI_D_0
DVI_D_1
DVI_D_2
DVI_D_3
DVI_D_4
DVI_D_5
DVI_D_6
DVI_D_7
DVI_D_8
DVI_D_9
FPGA Pin
V10
U11
AD17
AF25
AC11
AD15
AD11
AC12
AB12
Description
DVI_D_10
DVI_D_11
DVI_DE
DVI_GPOI1
DVI_H
DVI_RESET_B
DVI_V
DVI_XCLK_N
DVI_XCLK_P
6. Display Controller Device
The DVI circuitry uses a Chrontel CH7301C capable of 24-bit color and 1600 ×
1200-pixel resolution. The display controller device drives the digital and analog
signals to the DVI connector ( “5. DVI Connector” ). The display controller device is
controlled through the I 2 C bus.
The DVI connector supports the I 2 C protocol, allowing the development board to read
monitor configuration parameters, which can then be read by the FPGA through the
I 2 C bus. See “I2C Bus Addressing,” page 42 for detailed information.
18
Spartan-3A DSP 3400A Edition User Guide
UG498 (v2.2) November 17, 2008
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