参数资料
型号: HW-SD3400A-DSP-DB-UNI-G-J
厂商: Xilinx Inc
文件页数: 34/50页
文件大小: 0K
描述: KIT DEVELOPMENT SPARTAN 3ADSP
标准包装: 1
系列: Spartan®-3A
类型: DSP FPGA
适用于相关产品: Spartan?-3A DSP 3400A
所含物品: 板 - 不包括电源 -
Chapter 1: Introduction
R
28. RS232 Serial Port
This DB9 male connector allows the FPGA to communicate serial data to another
device. The port is wired as a host device (DCE) and configured to operate at up to
115200 bauds. For this reason, a null modem cable is normally required to connect the
board to the serial port on a computer. An interface device is used to shift the voltage
level between FPGA and RS232 signals.
Note: The FPGA is only connected to the TX and RX data pins of the serial port. As
such, other RS232 signals such as hardware flow-control signals are not used. For this
reason, flow control should be disabled when communicating with a computer.
Table 1-20:
Serial Port FPGA Pin Assignments
DB9 Pin
2
3
FPGA Pin
V14
AA20
TX
RX
Description
29. SPDIF Output Connectors
The SPDIF connector J20 is used to output digital audio output.
30. Configuration Jumpers
Ten configuration jumpers are present on the Spartan-3A DSP 3400A Edition board.
Table 1-21 defines how to use the configuration jumpers.
Table 1-21:
Configuration Jumpers
Jumper
JP1
Function
Prevents the USB
controller from running
the firmware in the I 2 C
On
1-2: Does not run the
firmware from I 2 C
EEPROM
Off
Runs the firmware from
the I 2 C EEPROM (default).
EEPROM.
JP2
Ethernet modes
1-2: GMII (default)
N/A
2-3: RGMII
JP5
JP6
FMC #1 I/O bank voltage
selection
Clock generator
programming mode
Voltage present a FPGA
and at FMC Connector J13
(default)
JTAG programming
(default)
No voltage present a
FPGA and at FMC
Connector J13
I 2 C programming
JP7/
JP8
System ACE failsafe mode Failsafe mode enabled
when both jumpers are
populated
Failsafe mode disabled
when both jumpers are
unpopulated
JP9
Fan controller bypass
Fan controller bypassed
Fan controller is not
bypassed (default)
JP10
JP11
LCD backlight control
FMC #2 I/O bank voltage
selection
Backlight is on (default)
Voltage present a FPGA
and at FMC Connector J19
(default)
Backlight is off
No voltage present a
FPGA and at FMC
Connector J19
34
Spartan-3A DSP 3400A Edition User Guide
UG498 (v2.2) November 17, 2008
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