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| 型号： | HW-SD3400A-DSP-DB-UNI-G-J |
| 厂商： | Xilinx Inc |
| 文件页数： | 46/50页 |
| 文件大小： | 0K |
| 描述： | KIT DEVELOPMENT SPARTAN 3ADSP |
| 标准包装： | 1 |
| 系列： | Spartan®-3A |
| 类型： | DSP FPGA |
| 适用于相关产品： | Spartan?-3A DSP 3400A |
| 所含物品： | 板 - 不包括电源 - |
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Chapter 2: Configuration Options
R
System ACE Controller Configuration
The System ACE controller can program the FPGA through the JTAG port. By inserting a
The System ACE controller supports up to eight configuration images that can be selected
be instructed use any of the eight configuration images.
The configuration mode should be set to 101 (ACE_CFGADDR0_IN (OFF),
ACE_CFGADDR1_IN (ON), ACE_CFGADDR2_IN (OFF) and ACE_CFG_EN should be
OFF to use System ACE configuration. See “33. Configuration DIP Switches,” page 36 for
information.
When set correctly, the System ACE controller programs the FPGA on power-up if a
CompactFlash card is present or whenever a CompactFlash card is inserted. Pressing the
System ACE reset button also causes the System ACE controller to program the FPGA if a
CompactFlash card is present.
Board Flash Memory Configuration
The board flash memory can also be used to program the FPGA. This memory can hold up
to two configuration images (or up to four with compression), selectable with the two least
The board is designed so the board flash memory can download bitstreams under master
serial, slave serial, master SelectMAP (parallel), or slave SelectMAP (parallel) modes.
Using iMPACT to program the memory, you can select which of the four modes to use in
programming the FPGA. The configuration mode DIP switches on the board must match
When correctly configured, the board flash memory programs the FPGA when the
Spartan-3A DSP 3400A Edition board is turned on or whenever the program button is
depressed. See “23. Program and Reset Buttons,” page 32 for information.
SPI Flash Memory Configuration
Data stored in the SPI flash memory can be used to program the FPGA. The configuration
mode DIP switches must be set to 0 0 1 to configure the FPGA from the SPI flash memory.
See “33. Configuration DIP Switches,” page 36 for information.
When correctly configured, the FPGA is programmed when the XtremeDSP Spartan-3A
DSP Development Board is turned on or whenever the program button is depressed.
46
Spartan-3A DSP 3400A Edition User Guide
UG498 (v2.2) November 17, 2008
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