- 您现在的位置：买卖IC网 > PDF目录17028 > HW-V5-PCIE2-UNI-G (Xilinx Inc)KIT DEV PCIEXPRESS GTX VIRTEX5 PDF资料下载
参数资料
| 型号： | HW-V5-PCIE2-UNI-G |
| 厂商： | Xilinx Inc |
| 文件页数： | 13/91页 |
| 文件大小： | 0K |
| 描述： | KIT DEV PCIEXPRESS GTX VIRTEX5 |
| 产品培训模块： | PCI Express and Virtex® -5 FPGAs |
| 标准包装： | 1 |
| 系列： | Virtex® -5 |
| 类型： | FPGA |
| 适用于相关产品： | Virtex?-5 FPGA |
| 所含物品： | 板，CD |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
20
GTX_DUAL Tile DC Input and Output Levels
Table 40 summarizes the DC output specifications of the GTX_DUAL tiles in Virtex-5 FPGAs. Figure 6 shows the single-
ended output voltage swing. Figure 7 shows the peak-to-peak differential output voltage.
Consult UG198:Virtex-5 FPGA RocketIO GTX Transceiver User Guide for further details.
Table 39: GTX_DUAL Tile Quiescent Supply Current
Symbol
Description
Typ(1)
Max
Units
IAVTTTXQ
Quiescent MGTAVTTTX (transmitter termination) supply current
8.2
21.6
mA
IAVCCPLLQ
Quiescent MGTAVCCPLL (PLL) supply current
0.8
4.8
mA
IAVTTRXQ
Quiescent MGTAVTTRX (receiver termination) supply current. Includes
MGTAVTTRXCQ.
1.2
12.0
mA
IAVCCQ
Quiescent MGTAVCC (analog) supply current
9.0
50.4
mA
Notes:
1.
Typical values are specified at nominal voltage, 25°C.
2.
Device powered and unconfigured.
3.
Currents for conditions other than values specified in this table can be obtained by using the XPOWER Estimator (XPE) or XPOWER
Analyzer (XPA) tools.
4.
GTX_DUAL tile quiescent supply current for an entire device can be calculated by multiplying the values in this table by the number of
available GTX_DUAL tiles in the target TXT or FXT device.
Table 40: GTX_DUAL Tile DC Specifications
Symbol
DC Parameter
Conditions
Min
Typ
Max
Units
DVPPIN
Differential peak-to-peak input
voltage
External AC coupled
≤ 4.25 Gb/s
125
1800
mV
External AC coupled
> 4.25 Gb/s
125
1800
mV
VIN
Absolute input voltage
DC coupled
MGTAVTTRX = 1.2V
–400
MGTAVTTRX +400
up to 1320
mV
VCMIN
Common mode input voltage
DC coupled
MGTAVTTRX = 1.2V
800
mV
DVPPOUT
Differential peak-to-peak output
voltage(1)
TXBUFDIFFCTRL = 111
1400
mV
VSEOUT
Single-ended output voltage
swing(1)
TXBUFDIFFCTRL = 111
700
mV
VCMOUT
Common mode output voltage
Equation based
MGTAVTTTX = 1.2V
1200–DVPPOUT/2
mV
RIN
Differential input resistance
85
100
120
Ω
ROUT
Differential output resistance
85
100
120
Ω
TOSKEW
Transmitter output skew
2
8
ps
CEXT
Recommended external AC coupling capacitor(2)
75
100
200
nF
Notes:
1.
The output swing and preemphasis levels are programmable using the attributes discussed in UG198:Virtex-5 FPGA RocketIO GTX
Transceiver User Guide and can result in values lower than reported in this table.
2.
Values outside of this range can be used as appropriate to conform to specific protocols and standards.
X-Ref Target - Figure 6
Figure 6: Single-Ended Output Voltage Swing
0
+V
P
N
VSEOUT
ds202_01_051607
相关PDF资料 |
PDF描述 |
|---|---|
| CORE1553-SA | HARDWARE FOR IP CORE1553 |
| EBA28DRMS | CONN EDGECARD 56POS .125 SQ WW |
| AMM03DSEN | CONN EDGECARD 6POS .156 EYELET |
| VE-B50-EY | CONVERTER MOD DC/DC 5V 50W |
| STD17W-G | WIRE & CABLE MARKERS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HW-VID-KIT | 功能描述:可编程逻辑 IC 开发工具 Lattice Video Interface Kit RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压: |
| HW-VL1 | 制造商:IDEC CORPORATION 功能描述:BARRIER |
| HW-VL2 | 制造商:IDEC Corporation 功能描述:COVER;HW FNGR SAFE CONTAC CVR 制造商:IDEC CORPORATION 功能描述:HW FNGR SAFE CONTAC CVR |
| HW-VL3 | 制造商:IDEC Corporation 功能描述: 制造商:IDEC Corporation 功能描述:Replacs TW-VL3 FNGR SAF |
| HWW-X030T-10015Z-H1 | 制造商:P-TEC 制造商全称:P-tec Corporation 功能描述:X30T RGB LED Wall Washers |
发布紧急采购，3分钟左右您将得到回复。