参数资料
型号: HY5PS1G821LM-C4
厂商: HYNIX SEMICONDUCTOR INC
元件分类: DRAM
英文描述: 1Gb DDR2 SDRAM(DDP)
中文描述: 128M X 8 DDR DRAM, 0.5 ns, PBGA63
封装: FBGA-63
文件页数: 58/79页
文件大小: 1109K
代理商: HY5PS1G821LM-C4
Rev. 0.2 / Oct. 2005
58
1
HY5PS12421(L)M
HY5PS12821(L)M
4.1 Absolute Maximum DC Ratings
4.2 Operating Temperature Condition
Symbol
Parameter
Rating
Units
Notes
VDD
Voltage on VDD pin relative to Vss
- 1.0 V ~ 2.3 V
V
1
VDDQ
Voltage on VDDQ pin relative to Vss
- 0.5 V ~ 2.3 V
V
1
VDDL
Voltage on VDDL pin relative to Vss
- 0.5 V ~ 2.3 V
V
1
V
IN
,
V
OUT
Voltage on any pin relative to Vss
- 0.5 V ~ 2.3 V
V
1
T
STG
Storage Temperature
-55 to +100
°
C
1
1.
Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
Symbol
Parameter
Rating
Units
Notes
Toper
Operating Temperature
0 to 85
°
C
1,2
1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions,
please refer to JESD51-2 standard.
2. The operatin temperature range are the temperature where all DRAM specification will be supported. Outside of this temperature
rang, even it is still within the limit of stress condition, some deviation on portion of operation specification may be required. During
operation, the DRAM case temperature must be maintained between 0 ~ 85
°
C under all other specification parameters. However,
in some applications, it is desirable to operate the DRAM up to 95
°
C case temperature. Therefore 2 spec options may exist.
1) Supporting 0 - 85
°
C with full JEDEC AC & DC specifications. This is the minimum requirements for all oprating temperature options.
2) Supporting 0 - 85
°
C and being able to extend to 95
°
C with doubling auto-refresh commands in frequency to a 32 ms
period(tRFI=3.9
us
).
Note; Self-refresh period within the above DRAM is hard coded at 64ms(tREFI= 7.8
us
).
Therfore, it is imperative that the system ensures
the DRAM is at or below 85
°
C case temperature before initiating self-refresh operation.
4. Operating Conditions
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