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参数资料
| 型号： | HY5V52EMP-H |
| 厂商： | HYNIX SEMICONDUCTOR INC |
| 元件分类： | DRAM |
| 英文描述： | 8M X 32 SYNCHRONOUS DRAM, 5.4 ns, PBGA90 |
| 封装： | 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, FBGA-90 |
| 文件页数： | 4/14页 |
| 文件大小： | 172K |
| 代理商： | HY5V52EMP-H |
Rev. 1.0 / Nov. 2005
12
1
Synchronous DRAM Memory 256Mbit (8Mx16bit *2stack)
HY5V52E(L)M(P) Series
AC CHARACTERISTICS II (AC operating conditions unless otherwise noted)
Note: 1. A new command can be given tRC after self refresh exit.
Parameter
Symbol
6
H
Unit
Note
Min
Max
Min
Max
RAS Cycle Time
Operation
tRC
60
-
63
-
ns
Auto
Refresh
tRRC
60
-
63
-
ns
RAS to CAS Delay
tRCD
18
-
20
-
ns
RAS Active Time
tRAS
42
100K
42
100K
ns
RAS Precharge Time
tRP
18
-
20
-
ns
RAS to RAS Bank Active Delay
tRRD
12
-
15
-
ns
CAS to CAS Delay
tCCD
1-1-
CLK
Write Command to Data-In Delay
tWTL
0
-
0
-
CLK
Data-in to Precharge Command
tDPL
2-2-
CLK
Data-In to Active Command
tDAL
tDPL + tRP
DQM to Data-Out Hi-Z
tDQZ
2-2-
CLK
DQM to Data-In Mask
tDQM
0-0-
CLK
MRS to New Command
tMRD
2-2-
CLK
Precharge to Data Output High-
Z
CL = 3
tPROZ3
3-3-
CLK
CL = 2
tPROZ2
2-2-
CLK
Power Down Exit Time
tDPE
1-1-
CLK
Self Refresh Exit Time
tSRE
1-1-
CLK
1
Refresh Time
tREF
-64-
64
ms
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相关代理商/技术参数 |
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|---|---|
| HY5V52F | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52F-H | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52F-P | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52FP-H | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
| HY5V52FP-P | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 32bits Synchronous DRAM |
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