参数资料
型号: IA88C00-PLC68I
厂商: Innovasic Semiconductor
英文描述: Microcontroller
中文描述: 微控制器
文件页数: 38/80页
文件大小: 707K
代理商: IA88C00-PLC68I
IA88C00
Microcontroller
Data Sheet
As of Production Version -01
Copyright
2005 ENG 21 0 050519-00 www.Innovasic
Innovasic.com
Innovasic Semiconductor
Page 38 of 80 1.888.824.4184
D0 - Handshake Enable
- When this bit is set to 1, the handshake function is enabled.
D1 - Port Select
- This bit selects which port is controlled by Handshake Channel 0. When it is set to 1,
Port 1 is selected and when it is cleared to 0, Port 4 is selected.
D2 - DMA Enable
- When this bit is set to 1, the DMA function is enabled for Handshake Channel 0.
When it is cleared to 0, the DMA function is not used by the handshake channel and may be used by the
UART.
D3 - Mode
- When this bit is set to 1, the "fully interlocked" mode is enabled. When it is cleared to 0, the
"strobed" mode is enabled.
D4-D7 - Deskew Count
er - This 4-bit field is used to select a count value from 1 to 16 (0000-1111). This
value is the number of processor clocks used to generate the set-up and strobe when using the "strobed"
mode, or the set-up when using the "fully-interlocked" mode.
Figure 37. Handshake 1 Control (H1C), R245 Bank 0
Bit
7
D7
X
W/O
6
D6
X
W/O
5
D5
X
W/O
4
D4
X
W/O
3
D3
X
W/O
2
D2
X
W/O
1
D1
X
W/O
0
D0
0
W/O
Initial Value
Read/Write
This register controls Handshake Channel 1.
D0 - Handshake Enable
- When this bit is set to 1, the handshake function is enabled.
D1
- Not Used.
D2
- Not Used.
D3 - Mode
- When this bit is set to 1, the "fully interlocked" mode is enabled. When it is cleared to 0, the
"strobed" mode is enabled.
D4-D7 - Deskew Counte
r - This 4-bit field is used to select a count value from 1 to 16 (0000-1111). This
value is the number of processor clocks used to generate the set-up and strobe when using the "strobed"
mode, or the set-up when using the "fully-interlocked" mode.
Figure 38. Port 4 Direction Control Register (P4D), R246 Bank 0
Bit
7
D7
1
R/W
6
D6
1
5
D5
1
4
D4
1
3
D3
1
2
D2
1
1
D1
1
0
D0
1
Initial Value
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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