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参数资料
| 型号： | IBM25405GP-3BA200C2 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | RISC PROCESSOR, PBGA456 |
| 封装： | PLASTIC, BGA-456 |
| 文件页数： | 16/48页 |
| 文件大小： | 649K |
| 代理商： | IBM25405GP-3BA200C2 |
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PowerPC 405GP Embedded Controller
Advance Information
Data Sheet
galdsh5f
06/15/99 Preliminary
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 23 of 48
Pin Lists
The 405GP embedded controller is packaged in a 35mm, 456-ball enhanced plastic ball grid array (E-PBGA).
The following tables describe the package level pinout.
Pin Summary
In the following table, each physical pin (ball) is represented in a table row along with a simple description of
the pin function. Some signals are multiplexed onto the same pin so that the pin is usable for different func-
tions. Multiplexed signals are shown in square brackets following the default signal (for example, C0:3[BE0:3])
and described consecutively within each pin functional description. Active-low signals such as BE0:3 are
marked with a black overline.
It is expected that in any single application a particular pin will always be programmed to serve the same
function. The exibility of multiplexing allows a single chip to offer a richer pin selection than would otherwise
be possible.
In addition to multiplexing, many pins are also multi-purpose. These pins are described in the table using a
single row with a text description that indicates the different functional uses of the pin. For example, the EBC
peripheral controller address pins are used as outputs by the 405GP to broadcast an address to external
slave devices when the 405GP has control of the external bus. When during the course of normal chip opera-
tion an external master gains ownership of the external bus, these same pins are used as inputs which are
driven by the external master and received by the EBC in the 405GP.
The table lists the exact signal name associated with each package pin. It also provides a brief description of
the function of each pin.
Block
No. of Signals
PCI
60
Ethernet
18
SDRAM
72
External peripheral
96
External master
9
Internal peripheral
15
Interrupts
7
JTAG
5
System
19
Total signal I/O
301
OVDD
32
VDD
24
Gnd
60
Thermal (and Gnd)
36
Reserved
3
Total I/O
456
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