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| 型号： | IBM25PPC750FX-GB0112T |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 600 MHz, RISC PROCESSOR, CBGA292 |
| 封装： | 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292 |
| 文件页数： | 31/62页 |
| 文件大小： | 452K |
| 代理商： | IBM25PPC750FX-GB0112T |
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DD 2.X
Preliminary
PowerPC 750FX RISC Microprocessor
Body_750FX_DS_DD2.X.fm.2.0
June 9, 2003
5. System Design Information
Page 35 of 63
5.2 PLL Power Supply Filtering
The 750FX microprocessor has two separate AVDD signals (A1VDD and A2VDD) which provide power to the
clock generation phase-locked loops.
Most designs are expected to utilize a single PLL configuration mode throughout the application. These type
of designs should use the default, A1VDD (PLL0) and tie the A2VDD (PLL1) signal to ground (AGND) through
a 100 ohm resistor. This is shown in Figure 5-1 on page 36.
For designs planning to optimize power savings through dynamic switching between these dual PLL circuits,
it is recommended, though not required, that each AVDD have a separate voltage input and filter circuit.
To ensure stability of the internal clock, the power supplied to the AVDD input signals should be filtered using
a circuit similar to the one shown in Figure 5-1 on page 36. The circuit should be placed as close as possible
to the AVDD pin to ensure it filters out as much noise as possible.
For descriptions of the sample PLL power supply filtering circuits, see Table 5-3.
Table 5-3. Sample PLL Power Supply Filtering Circuits
Samples of PLL Power Supply Filtering Circuits
Circuit Description
Number of
Filtering
Circuits
Ferrite
Beads
Circuit Figure
Recommended
Circuit Design
Notes
Single PLL circuit configuration that uses the A1VDD
and ties the A2VDD pin to GND.
11
Yes
Single PLL circuit configuration that uses both the
A1VDD and the A2VDD pins and a single ferrite bead.
11
Optional
1, 2
Dual PLL configuration that uses a separate circuit
for the A1VDD pin and for the A2VDD the pin.
22
Yes
2, 3
Notes:
1. Optional configurations are supported, though not recommended.
2. This circuit design can be used with the Dual PLL feature enabled, though optimum power savings may not be realized.
For additional information, see Figure 5-3 Dual PLL Power Supply Filter Circuits on page 38.
3. This circuit design can be used with the Dual PLL feature enabled to optimize power savings.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IBM25PPC750FX-GB0122V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FX-GB0132T | 制造商:IC'S/TRANSISTORS/DIO 功能描述: 制造商:IC'S/TRANSISTORS/DIODES 功能描述: |
| IBM25PPC750FX-GB0132V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FX-GB0133V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FX-GB0532V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
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