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参数资料
| 型号： | ICL7136CM44Z |
| 厂商： | Intersil |
| 文件页数： | 10/15页 |
| 文件大小： | 0K |
| 描述： | IC ADC 3.5DIGIT LOW PWR 44-MQFP |
| 标准包装： | 96 |
| 显示器类型： | LCD |
| 配置： | 7 段显示 |
| 数字或字符： | A/D，3.5 位数字 |
| 电流 - 电源： | 70µA |
| 电源电压： | 9V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 托盘 |
ICL7136
System Timing
Figure 7 shows the clocking arrangement used in the
ICL7136. Two basic clocking arrangements can be used:
1. Figure 9A, an external oscillator connected to DIP pin 40.
2. Figure 9B, an R-C oscillator using all three pins.
The oscillator frequency is divided by four before it clocks
the decade counters. It is then further divided to form the
three convert-cycle phases. These are signal integrate
(1000 counts), reference de-integrate (0 to 2000 counts) and
auto-zero (1000 to 3000 counts). For signals less than full
scale, auto-zero gets the unused portion of reference de-
integrate. This makes a complete measure cycle of 4,000
counts (16,000 clock pulses) independent of input voltage.
For three readings/second, an oscillator frequency of 48kHz
would be used.
To achieve maximum rejection of 60Hz pickup, the signal
integrate cycle should be a multiple of 60Hz. Oscillator
frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz,
40kHz, 33 1 / 3 kHz, etc., should be selected. For 50Hz
rejection, Oscillator frequencies of 200kHz, 100kHz,
66 2 / 3 kHz, 50kHz, 40kHz, etc. would be suitable. Note that
40kHz (2.5 readings/sec.) will reject both 50Hz and 60Hz
(also 400Hz and 440Hz).
INTERNAL TO PART
Component Value Selection
Integrating Resistor
Both the buffer amplifier and the integrator have a class A
output stage with 100 μ A of quiescent current. They can
supply 1 μ A of drive current with negligible nonlinearity. The
integrating resistor should be large enough to remain in this
very linear region over the input voltage range, but small
enough that undue leakage requirements are not placed on
the PC board. For 2V full scale, 1.8M ? is near optimum and
similarly a 180k ? for a 200mV scale.
Integrating Capacitor
The integrating capacitor should be selected to give the
maximum voltage swing that ensures tolerance buildup will
not saturate the integrator swing (approximately 0.3V from
either supply). In the ICL7136, when the analog COMMON
is used as a reference, a nominal +2V full-scale integrator
swing is fine. For three readings/second (48kHz clock)
nominal values for C lNT are 0.047 μ F and 0.5 μ F,
respectively. Of course, if different oscillator frequencies are
used, these values should be changed in inverse proportion
to maintain the same output swing.
An additional requirement of the integrating capacitor is that
it must have a low dielectric absorption to prevent roll-over
errors. While other types of capacitors are adequate for this
application, polypropylene capacitors give undetectable
3 4
CLOCK
errors at reasonable cost.
Auto-Zero Capacitor
The size of the auto-zero capacitor has some influence on
40
39
38
the noise of the system. For 200mV full scale where noise is
very important, a 0.47 μ F capacitor is recommended. On the
2V scale, a 0.047 μ F capacitor increases the speed of
recovery from overload and is adequate for noise on this
TEST
FIGURE 7A. EXTERNAL OSCILLATOR
scale.
Reference Capacitor
INTERNAL TO PART
3 4
CLOCK
A 0.1 μ F capacitor gives good results in most applications.
However, where a large common mode voltage exists (i.e.,
the REF LO pin is not at analog COMMON) and a 200mV
scale is used, a larger value is required to prevent roll-over
error. Generally 1 μ F will hold the roll-over error to 0.5 count
40
39
R
38
C
in this instance.
Oscillator Components
For all ranges of frequency a 180k ? resistor is
recommended and the capacitor is selected from the
f = ------------- For 48kHz Clock (3 Readings/s.),
FIGURE 7B. RC OSCILLATOR
FIGURE 7. CLOCK CIRCUITS
10
equation:
0.45
RC
C = 50pF .
FN3086.6
July 21, 2005
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