参数资料
型号: ICL7667CPAZ
厂商: Intersil
文件页数: 10/10页
文件大小: 0K
描述: IC MOSFET DRIVER DUAL HS 8DIP
标准包装: 50
配置: 低端
输入类型: 反相
延迟时间: 20ns
电流 - 峰: 1A
配置数: 2
输出数: 2
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
产品目录页面: 1240 (CN2011-ZH PDF)
ICL7667
Dual-In-Line Plastic Packages (PDIP)
INDEX
AREA
-A-
N
1 2 3
D
N/2
E1
-B-
E
E8.3 (JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL MIN MAX MIN MAX
A - 0.210 - 5.33
A1 0.015 - 0.39 -
NOTES
4
4
BASE
PLANE
SEATING
PLANE
-C-
A2
L
A
CL
A2
B
B1
0.115
0.014
0.045
0.195
0.022
0.070
2.93
0.356
1.15
4.95
0.558
1.77
-
-
8, 10
D1
B1
B
D1
e
0.010 (0.25) M
A 1
e C
C A B S
e A
C
e B
C
D
D1
0.008
0.355
0.005
0.014
0.400
-
0.204
9.01
0.13
0.355
10.16
-
-
5
5
E
0.300
0.325
7.62
8.25
6
NOTES:
E1
0.240
0.280
6.10
7.11
5
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
e
e A
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
6
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS - 3.
5. D, D1, and E1 dimensions do not include mold flash or protru-
e B
L
N
-
0.115
8
0.430
0.150
-
2.93
8
10.92
3.81
7
4
9
Rev. 0 12/93
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and e A are measured with the leads constrained to be per-
pendicular to datum -C- .
7. e B and e C are measured at the lead tips with the leads uncon-
strained. e C must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
FN2853.6
April 29, 2010
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