参数资料
型号: ICS1893AFILFT
厂商: IDT, Integrated Device Technology Inc
文件页数: 5/136页
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
标准包装: 1,000
系列: PHYceiver™
类型: PHY 收发器
规程: MII
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 48-BSSOP(0.295",7.50mm 宽)
供应商设备封装: 48-SSOP
包装: 带卷 (TR)
其它名称: 1893AFILFT
ICS1893AF, Rev D 10/26/04
October, 2004
102
Chapter 9
Pin Diagram, Listings, and Descriptions
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
P1CL
3
Input or
Output
PHY (Address Bit) 1 / Collision LED.
For more information on this pin, see Section 6.5, “Status Interface”.
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
this case, this pin configures the ICS1893AF PHY Address Bit 1.
– An output pin following reset. In this case, this pin provides collision
status for the ICS1893AF.
As an input pin:
This pin establishes the address for the ICS1893AF. When the signal
on this pin is Logic:
– Low, that address bit is set to logic zero.
– High, that address is set to logic one.
As an output pin:
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not detect any
collisions.
– Asserted, this state indicates the ICS1893AF detects collisions.
The ICS1893AF asserts its Collision LED for a period of approximately
70 msec when it detects a collision.
Caution:
This pin must not float. (See the notes at Section 9.2.2,
P2LI
4
Input or
Output
PHY (Address Bit) 2 / Link Integrity LED.
For more information on this pin, see Section 6.5, “Status Interface”.
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
this case, this pin configures the address of the ICS1893AF PHY
Address Bit 2.
– An output pin following reset. In this case, this pin provides link status
for the ICS1893AF.
As an input pin:
This pins establishes the address for the ICS1893AF. When the signal
on this pin is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
As an output pin:
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not have a
link.
– Asserted, this state indicates the ICS1893AF has a valid link.
Caution:
This pin must not float. (See the notes at Section 9.2.2,
Table 9-6.
PHY Address and LED Pins
Pin
Name
Pin
Number
Pin
Type
Pin Description
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